Hi everyone, We have a unity gain fully differential buffer with continuous time CMFB in our design (0.18um CMOS). This buffer's output common mode voltage always saturates to very close to positive power supply as soon as it's turned on. In simulation, we had to add greater than 10% mismatch to induce similar result which is highly unlikely in practice. The circuit uses a two stage folded cascode as the first stage and a CS stage as the output stage. The first stage has two differential pairs to handle the possitive and negative input and the unity gain feed back. A third differential pair is used to handle common mode feedback. One of the branches of the common mode differential pair is split in two and merged with signal path differential pairs to form a current stearing CMFB. The common mode detector is just two resistors. We'd appreciate it very much if someone could point us to the right direction for finding the root cause of this problem. Thanks in advance for your help.
George