Help needed in design and simulation of CMOS inverter using HSPICE

Q1. Design a CMOS inverter by doing HSPICE simulation to determine or finalize the W/L of the n-ch and p-ch devices when the inverter will drive another inverter of same size. Consider =CE=BB design rule in a 0.35- =CE=BCm process (=CE=BB =3D 0.2-=CE=BCm). Using model file from www.mosis.o= rg for .

35micronm

I'm very much new into HSPICE and i have been trying to do,but just wana need help initially.

Provide me steps to approach the solution.

Help appreciated

Thanks

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sana
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