help designing gimmick capacitor

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Hmm. I might have got a hot FET as my cap is spaced 5 mm vs his 3mm. I calculated 0.177pf for my cap. Had adjusted the circuit voltage gain after the FET circuit for 17. Then adjusted the cap for a total gain of 1.

Oh, I had assumed a much higher impedance for that small cap. Best not to assume :-)

The author says the amp's input capacitance is 1.4pF. That means

I'll be trying the twisted pair to reduce that stray capacitance. Mikek

=A0V1

Yep.

It's in that direction, but both the FET follower and the BJT follower have less than unity gain.

And higher gain. The FET follower gain right now is well under 1. A good current source would get it a lot closer, which also improves the bootstrap cancellation. A much higher R4 is a compromise solution.

With the bootstrapping the input impedance is increased to several times the original circuit's.

I just scribbled that thing out. On inspection, the V1 divider resistances are too high--knock them down by 10x please, and boost V1 to around 7V. R3 isn't needed then, as that gives plenty of headroom.

-- Cheers, James Arthur

If the source of the fet follower drives an opamp with a gain of, say,

+2, you could take the amp's output, run it through a pot, and AC couple that into the drain.

With the pot at zero gain, there's no bootstrapping, so the fet's Cg-d loads the input 100%.

With the pot at mid-rotation, the drain is forced to swing up and down just about as much as the input signal does. Since both ends of Cg-d are at the same signal level, there's almost no current in that capacitance, so it sort of disappears, as far as the gate is concerned.

Turn the pot a little more, and a small excursion at the gate results in a *bigger* excursion at the drain. So the current in Cg-d flows in the opposite direction from a real capacitor, and Cg-d becomes a negative capacitor. It can then be used to cancel all other capacitance at the gate node, making the box have a net nearly-zero input capacitance.

Or just add a small variable cap from the opamp output back into the gate, and adjust for near zero input capacitance. When it oscillates, you've gone too far.

John

I haven't run the numbers but I'd guess bootstrapping input Z is lower noise than a large resistor ?? ...Jim Thompson

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| James E.Thompson, CTO                            |    mens     |
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      Remember: Once you go over the hill, you pick up speed

It's usually worse. You always pay in SNR for input bootstraps--the only way to get really high SNR with a 300 kelvin resistor is to drop lots of volts across it, and using feedback to make a small resistor look like a large one is going in the wrong direction for that. It's often a win for other reasons, of course, e.g. cost and drift.

Bootstrapping the drain is almost always a win for SNR, but you still wind up with an input noise current contribution of e_Nbootstrap times omega C_DG.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal
ElectroOptical Innovations
55 Orchard Rd
Briarcliff Manor NY 10510
845-480-2058

email: hobbs (atsign) electrooptical (period) net
http://electrooptical.net

Does the term SNIP have any meaning to you?

Jim

Save up and buy yourself some scroll bars.

John

Response before looking at others: 1. use one 10Meg and connect it to source OR cap bootstrap the 10meg input divider to the source. 2. "wrap" a shield around the input wire & plate and drive the shield from the FET source or T2 emitter. 3 What the heck is that HUGE block attached to the input plate? Ditech it; you will see a significant decrease in input capacitance.

I quoted the original post. Did you think the original was irrelevant? I don't agree.

I try to quote enough so that a newcomer can, in one post, understand both the full question I'm responding to, and my reply.

-- Cheers, James Arthur

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Thanks for the explanation James. The bootstrapping of the base does nothing for the input capacitance.(?) Is that correct?

George H.

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That's too tight a box, and the dielectric screws things up--you'll be making shunt caps to the shield.

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I tried a twisted pair of #26 wire and got way more capacitance then I wanted. I ended up with just about 1/4" layed side by side as about equal to 0.3pf. When I put the cover on there was much less effect on the signal than with the previously used plate capacitor. The side by side wire is not stable for long term use, so I'll find a way to stablize it and call this one a wrap. I'll try tying a low capacitance knot ;-) I have two more boards and boxes, I'll build a bootstrapped version for the next design. I'll be back, I might try one with a gain of 1 and one with a gain of maybe 10. Mikek

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Just half a twist is likely enough--regular twisted pair is way too tightly coupled.

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-- Cheers, James Arthur

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hanks, Mikek

=A0V1

If you mean "gate" and Q1, that's inherently bootstrapped by the voltage-follower configuration: the source already rises and falls with the input, leaving the Miller capacitance as by far the biggest nasty. The best, easy bootstrap for the FET input capacitance is getting the FET follower gain up closer to unity. That means using a current source for the source load instead of R4.

The input bootstrap above--C2 to the junction of R1-R2--serves to reduce the a) stray capacitive loading posed by R1, and b) raise the a.c. input impedance to much higher than the 20M input resistor in parallel with the FET gate impedance.

-- Cheers, James Arthur

amdx Inscribed thus:

box.http://i395.photobucket.com/albums/pp37/Qmavam/Kleijerampinbox.jpg

Try a glass cased diode with one end cut off so the case is empty. Use the wire at one end for one connection, use a piece of thick wire inside the tube for the other connection. Adjust for "C". Secure with a drop of adhesive.

--
Best Regards:
                          Baron.

Heat shrink?

Good Luck! Rich

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=A0 =A0V1

Uh yes... Gate of Q1. (thanks for reading my mind.)

George H.

If more than one is to be made, then something more stable all the way around should be selected.

A simple piece of RG-174 would work just fine. Hell, a short piece of semi-rigid coax would work as well.

This solution also has the benefit of being very exact. Making ten is a matter of simply cutting ten lengths once you have dialed in your value. VERY repeatable.

How short?

RG174 has a capacitance of 30.8 pF/ft and he wants .3 pF.

Since you don't know how to think for yourself or make simple calculations, I will tell you that this would require .3 pF/30.8 pF/ft which is This solution also has the benefit of being very exact. Making ten is

Pooh! Why don't you TRY IT, NymNuts?

How about stripping two adjacent wires out a piece of ribbon cable? Trim back one from one end, and the other from the other end, leaving an inch or so of overlap between the two wires. Solder the ends of the two onto the appropriate contacts, and then start trimming one or the other ends of the overlapping wires until you get down to the amount of capacitance you want.

--
Dave Platt                                    AE6EO
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