Here's the situation in simplified schematic form, generate a high-efficiency sine wave at around 3-5MHz putting out about 5 watts into resistive load:
Just drive it like two half-bridges with appropriate logic-level wavaeforms (some dead-time) and if you look at the two switching nodes together on a plot you get the red/black waveform there under inductor L1. LC filter it through a coupled inductor. and Bob's your Dad's uncle. in theory.
First attempt at it on a protoboard:
"it looks great in the sim" and the connection of the boost diodes to the switching nodes gives a nice ~12-13 volt Vdd to common rail above the lockout threshold for the flying driver's supply nodes and keeps all the component dissipation low.
Total miserable nightmare to get working right as a prototype, losing gate drivers for unknown reason, these chips seem way slower than the ~50n prop delay specified in the datasheet, can't get up to speed. I don't think this 4120 likes being driven the way it's connected here in reality and they're dying on me, or I've made an error in the implementation somewhere i can't readily spot.
Anyway, I hate it, looking for any suggestions or alternate gate-drive schemes for this, I'd like a cheaper faster and more rugged one, as someone mentioned I don't really need the ADuM4120's internal transformer isolation if I could find a good way to level-shift the incoming logic level drive appropriately to the negative rails the lower FETs have. Thanks