goofy PWM

John Larkin · 2015-05-29T05:20:14+00:00

I need an isolated analog output (many of them, actually) with, say, 1 PPM programmability and linearity. An optocoupled DAC would be silly, so I'll use PWM. If I start at 200 MHz, and do a 20 bit (1 PPM) pwm, the output frequency would be 200 Hz. If I use a 3-pole lowpass filter (not too much delay) it has to be -3 dB at 2 Hz to get the ripple down to 1 PPM. That's the n-squared dilemma of straight PWM. (Delta-sigma is noisy and has a lot of squirmy transitions. The average value will be disturbed by the rise and fall times of the optocoupler (or whatever) so getting to 1 PPM linearity is scary.) To make, say, 20% output, PWM would be (in decimal) 200000 clocks high and 800000 clocks low. The ripple is 200 Hz. But we could break the 5 msec PWM interval into four chunks, 50000 ticks high each, with the 800000 lows spread out between. That raises the ripple frequency to 800 Hz, and the filter bandwidth can go up to 8 Hz to maintain the 1 PPM ripple. Less delay. To increase the straight PWM output by 1 PPM, the ON time would increase to 200001 ticks. In the boogered version, we'd generate 50001, 50000, 50000, and 50000 highs. 200002 would translate to pulse widths of 50001, 50000, 50001 and 50000 clocks. That balances the ripple. Turns out there's an appnote a lot like this. An 8-fold booger is shown in Table 6. That would be nice, push my ripple frequency up to 1600 Hz. There seems to be no resolution or linearity penalty as long as I stay away from 0 and 100% duty cycle. ST was trying to get more resolution out of a fixed-length PWM generator. In my FPGA, I can make any width PWM machine, but the trick is used to push the ripple frequency up. Unlike true delta-sigma or PWM with a delta-sigma LSB dithering scheme, this is totally deterministic, hence noise-free, excepting the ripple. -- John Larkin Highland Technology, Inc picosecond timing laser drivers and controllers jlarkin att highlandtechnology dott com

May 29, 2015 45 Replies

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dagmargoodboat 11 years ago

The ripple waveform for a given code is known. Why not S/H the filtered PWM waveform, sampling at the precise time the waveform is/will be at the correct voltage for that code?

That is, effectively, adaptively sample the ripple 'ramp' in lieu of PWM 'boogering.' Sort of the opposite of a time-to-digital converter.

Even a first-order filter settles to zip ripple, quickly.

Cheers, James Arthur

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Bill Sloman 11 years ago

I believe that's exactly what I described back in 1996, and more recently here.

Bill Sloman, Sydney

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Bill Sloman 11 years ago

I believe that's exactly what I described back in 1996, and more recently here.

Bill Sloman, Sydney

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John Larkin 11 years ago

It's hard to make a really accurate and stable s/h. And it's a bunch of parts.

I may just use the DAC1220 and feed it clk/data/stb through a quad isolator, and not do the ADC feedback. But the goofy PWM was fun to think about.

John Larkin Highland Technology, Inc picosecond timing precision measurement jlarkin att highlandtechnology dott com http://www.highlandtechnology.com

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