fast flop NB7V52

"Jeroen Belleman" snipped-for-privacy@nospam.please wrote in message news:1138k6a$1bsnp$ snipped-for-privacy@dont-email.me...

Ok here's divide by 2 in CMOS. Divide by 3 just needs to duplicate that and add some gating to set up next states of 01,10,00 from current states of 00,01,10

Line 451 will need to be unwrapped so that lines 451 and 452 begin with TEXT

Version 4.1 SHEET 1 2452 3392 WIRE 224 -192 192 -192 WIRE 288 -192 288 -256 WIRE 288 -192 224 -192 WIRE 352 -192 288 -192 WIRE 384 -192 352 -192 WIRE 192 -144 192 -192 WIRE 384 -144 384 -192 WIRE 144 -128 96 -128 WIRE 496 -128 432 -128 WIRE 224 -96 224 -192 WIRE 224 -96 192 -96 WIRE 352 -96 352 -192 WIRE 384 -96 352 -96 WIRE 192 -16 192 -48 WIRE 288 -16 192 -16 WIRE 384 -16 384 -48 WIRE 384 -16 288 -16 WIRE 560 -16 384 -16 WIRE 288 32 288 -16 WIRE 336 80 288 80 WIRE 336 96 336 80 WIRE 96 112 96 -128 WIRE 96 112 32 112 WIRE 240 112 96 112 WIRE 496 176 496 -128 WIRE 496 176 96 176 WIRE 288 208 288 128 WIRE 336 256 288 256 WIRE 336 272 336 256 WIRE 96 288 96 176 WIRE 240 288 96 288 WIRE 288 320 288 304 WIRE 96 384 96 288 WIRE 560 384 560 -16 WIRE 1056 544 1024 544 WIRE 1120 544 1120 480 WIRE 1120 544 1056 544 WIRE 1184 544 1120 544 WIRE 1216 544 1184 544 WIRE 96 560 560 384 WIRE 560 560 96 384 WIRE 1024 592 1024 544 WIRE 1216 592 1216 544 WIRE 976 608 928 608 WIRE 1328 608 1264 608 WIRE 1056 640 1056 544 WIRE 1056 640 1024 640 WIRE 1184 640 1184 544 WIRE 1216 640 1184 640 WIRE 224 672 192 672 WIRE 288 672 288 608 WIRE 288 672 224 672 WIRE 352 672 288 672 WIRE 384 672 352 672 WIRE 192 720 192 672 WIRE 384 720 384 672 WIRE 1024 720 1024 688 WIRE 1120 720 1024 720 WIRE 1216 720 1216 688 WIRE 1216 720 1120 720 WIRE 1392 720 1216 720 WIRE 1456 720 1392 720 WIRE 1648 720 1456 720 WIRE 96 736 96 560 WIRE 144 736 96 736 WIRE 496 736 432 736 WIRE 224 768 224 672 WIRE 224 768 192 768 WIRE 352 768 352 672 WIRE 384 768 352 768 WIRE 1120 768 1120 720 WIRE 1168 816 1120 816 WIRE 1168 832 1168 816 WIRE 192 848 192 816 WIRE 288 848 192 848 WIRE 384 848 384 816 WIRE 384 848 288 848 WIRE 560 848 560 560 WIRE 560 848 384 848 WIRE 928 848 928 608 WIRE 928 848 560 848 WIRE 1072 848 928 848 WIRE 288 896 288 848 WIRE 1328 912 1328 608 WIRE 1328 912 928 912 WIRE 336 944 288 944 WIRE 1120 944 1120 864 WIRE 336 960 336 944 WIRE 96 976 96 736 WIRE 240 976 96 976 WIRE 1168 992 1120 992 WIRE 1168 1008 1168 992 WIRE 928 1024 928 912 WIRE 1072 1024 928 1024 WIRE 496 1040 496 736 WIRE 496 1040 96 1040 WIRE 1120 1056 1120 1040 WIRE 288 1072 288 992 WIRE 336 1120 288 1120 WIRE 928 1120 928 1024 WIRE 1392 1120 1392 720 WIRE 336 1136 336 1120 WIRE 96 1152 96 1040 WIRE 96 1152 -208 1152 WIRE 240 1152 96 1152 WIRE 288 1184 288 1168 WIRE 560 1216 560 848 WIRE -480 1296 -512 1296 WIRE -432 1296 -480 1296 WIRE 928 1296 1392 1120 WIRE 1392 1296 928 1120 WIRE -512 1344 -512 1296 WIRE 96 1392 560 1216 WIRE 1056 1408 1024 1408 WIRE 1120 1408 1120 1344 WIRE 1120 1408 1056 1408 WIRE 1184 1408 1120 1408 WIRE 1216 1408 1184 1408 WIRE 1024 1456 1024 1408 WIRE 1216 1456 1216 1408 WIRE -512 1472 -512 1424 WIRE 928 1472 928 1296 WIRE 976 1472 928 1472 WIRE 1328 1472 1264 1472 WIRE 1056 1504 1056 1408 WIRE 1056 1504 1024 1504 WIRE 1184 1504 1184 1408 WIRE 1216 1504 1184 1504 WIRE 224 1520 192 1520 WIRE 288 1520 288 1456 WIRE 288 1520 224 1520 WIRE 352 1520 288 1520 WIRE 384 1520 352 1520 WIRE 544 1520 384 1520 WIRE 576 1520 544 1520 WIRE 192 1568 192 1520 WIRE 384 1568 384 1520 WIRE 576 1568 576 1520 WIRE 96 1584 96 1392 WIRE 144 1584 96 1584 WIRE 496 1584 432 1584 WIRE 688 1584 624 1584 WIRE 1024 1584 1024 1552 WIRE 1120 1584 1024 1584 WIRE 1216 1584 1216 1552 WIRE 1216 1584 1120 1584 WIRE 1392 1584 1392 1296 WIRE 1392 1584 1216 1584 WIRE 1488 1584 1392 1584 WIRE 1648 1584 1488 1584 WIRE 224 1616 224 1520 WIRE 224 1616 192 1616 WIRE 352 1616 352 1520 WIRE 384 1616 352 1616 WIRE 544 1616 544 1520 WIRE 576 1616 544 1616 WIRE 1120 1632 1120 1584 WIRE 1168 1680 1120 1680 WIRE 192 1696 192 1664 WIRE 288 1696 192 1696 WIRE 384 1696 384 1664 WIRE 384 1696 288 1696 WIRE 576 1696 576 1664 WIRE 576 1696 384 1696 WIRE 768 1696 576 1696 WIRE 1168 1696 1168 1680 WIRE 928 1712 928 1472 WIRE 1072 1712 928 1712 WIRE 288 1744 288 1696 WIRE 1328 1776 1328 1472 WIRE 1328 1776 928 1776 WIRE 336 1792 288 1792 WIRE 336 1808 336 1792 WIRE 1120 1808 1120 1728 WIRE 96 1824 96 1584 WIRE 240 1824 96 1824 WIRE 1168 1856 1120 1856 WIRE 1168 1872 1168 1856 WIRE 496 1888 496 1584 WIRE 496 1888 96 1888 WIRE 768 1888 768 1696 WIRE 928 1888 928 1776 WIRE 928 1888 768 1888 WIRE 1072 1888 928 1888 WIRE 288 1920 288 1840 WIRE 1120 1920 1120 1904 WIRE 336 1968 288 1968 WIRE 336 1984 336 1968 WIRE -448 2000 -512 2000 WIRE -208 2000 -208 1152 WIRE -208 2000 -448 2000 WIRE 96 2000 96 1888 WIRE 96 2000 -208 2000 WIRE 240 2000 96 2000 WIRE 688 2064 688 1584 WIRE 688 2064 96 2064 WIRE -512 2096 -512 2000 WIRE 288 2096 288 2016 WIRE 336 2144 288 2144 WIRE 336 2160 336 2144 WIRE 96 2176 96 2064 WIRE 240 2176 96 2176 WIRE 288 2208 288 2192 WIRE -512 2240 -512 2176 WIRE 96 2272 96 2176 WIRE 768 2272 768 1888 WIRE 768 2272 560 2272 WIRE 96 2448 560 2272 WIRE 560 2448 96 2272 WIRE 224 2576 192 2576 WIRE 288 2576 288 2512 WIRE 288 2576 224 2576 WIRE 352 2576 288 2576 WIRE 384 2576 352 2576 WIRE 192 2624 192 2576 WIRE 384 2624 384 2576 WIRE 96 2640 96 2448 WIRE 144 2640 96 2640 WIRE 496 2640 432 2640 WIRE 224 2672 224 2576 WIRE 224 2672 192 2672 WIRE 352 2672 352 2576 WIRE 384 2672 352 2672 WIRE 192 2752 192 2720 WIRE 288 2752 192 2752 WIRE 384 2752 384 2720 WIRE 384 2752 288 2752 WIRE 560 2752 560 2448 WIRE 560 2752 384 2752 WIRE 288 2800 288 2752 WIRE 336 2848 288 2848 WIRE 336 2864 336 2848 WIRE 96 2880 96 2640 WIRE 240 2880 96 2880 WIRE 496 2944 496 2640 WIRE 496 2944 96 2944 WIRE 288 2976 288 2896 WIRE 336 3024 288 3024 WIRE 336 3040 336 3024 WIRE 96 3056 96 2944 WIRE 96 3056 -208 3056 WIRE 240 3056 96 3056 WIRE 288 3088 288 3072 WIRE 32 3152 32 112 WIRE 560 3152 560 2752 WIRE 560 3152 32 3152 WIRE -208 3264 -208 3056 WIRE 1648 3264 1648 1584 WIRE 1648 3264 -208 3264 FLAG -512 1472 0 FLAG -480 1296 Vdd FLAG 288 -256 Vdd FLAG 288 320 0 FLAG 336 96 0 FLAG 336 272 0 FLAG 288 1184 0 FLAG 336 960 0 FLAG 336 1136 0 FLAG 336 1808 0 FLAG 336 1984 0 FLAG 288 2208 0 FLAG 336 2160 0 FLAG 288 3088 0 FLAG 336 2864 0 FLAG 336 3040 0 FLAG 1120 1056 0 FLAG 1168 832 0 FLAG 1168 1008 0 FLAG 1120 1920 0 FLAG 1168 1696 0 FLAG 1168 1872 0 FLAG -512 2240 0 FLAG 288 608 Vdd FLAG 1120 480 Vdd FLAG 288 1456 Vdd FLAG 1120 1344 Vdd FLAG 288 2512 Vdd FLAG -448 2000 Ck FLAG 1456 720 Q FLAG 1488 1584 Qbar SYMBOL voltage -512 1328 R0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V1 SYMATTR Value 5 SYMBOL voltage -512 2080 R0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V2 SYMATTR Value PULSE(0 5 0 10n 10n 1m 2m 10) SYMBOL pmos4 144 -48 M180 WINDOW 0 -16 -8 Left 2 WINDOW 3 36 31 Left 2 SYMATTR InstName M1 SYMATTR Value P_1u SYMATTR Value2 l=1u w=10u SYMBOL pmos4 432 -48 R180 WINDOW 0 -16 -8 Left 2 WINDOW 3 36 31 Left 2 SYMATTR InstName M2 SYMATTR Value P_1u SYMATTR Value2 l=1u w=10u SYMBOL nmos4 240 32 R0 WINDOW 0 -41 27 Left 2 WINDOW 3 62 21 Left 2 SYMATTR InstName M3 SYMATTR Value N_1u SYMATTR Value2 l=1u w=10u SYMBOL nmos4 240 208 R0 WINDOW 0 -41 27 Left 2 WINDOW 3 62 21 Left 2 SYMATTR InstName M4 SYMATTR Value N_1u SYMATTR Value2 l=1u w=10u SYMBOL pmos4 144 816 M180 WINDOW 0 -16 -8 Left 2 WINDOW 3 36 31 Left 2 SYMATTR InstName M5 SYMATTR Value P_1u SYMATTR Value2 l=1u w=10u SYMBOL pmos4 432 816 R180 WINDOW 0 -16 -8 Left 2 WINDOW 3 36 31 Left 2 SYMATTR InstName M6 SYMATTR Value P_1u SYMATTR Value2 l=1u w=10u SYMBOL nmos4 240 896 R0 WINDOW 0 -41 27 Left 2 WINDOW 3 62 21 Left 2 SYMATTR InstName M7 SYMATTR Value N_1u SYMATTR Value2 l=1u w=10u SYMBOL nmos4 240 1072 R0 WINDOW 0 -41 27 Left 2 WINDOW 3 62 21 Left 2 SYMATTR InstName M8 SYMATTR Value N_1u SYMATTR Value2 l=1u w=10u SYMBOL pmos4 976 688 M180 WINDOW 0 -16 -8 Left 2 WINDOW 3 36 31 Left 2 SYMATTR InstName M19 SYMATTR Value P_1u SYMATTR Value2 l=1u w=10u SYMBOL pmos4 1264 688 R180 WINDOW 0 -16 -8 Left 2 WINDOW 3 36 31 Left 2 SYMATTR InstName M20 SYMATTR Value P_1u SYMATTR Value2 l=1u w=10u SYMBOL nmos4 1072 768 R0 WINDOW 0 -47 25 Left 2 WINDOW 3 62 21 Left 2 SYMATTR InstName M21 SYMATTR Value N_1u SYMATTR Value2 l=1u w=10u SYMBOL nmos4 1072 944 R0 WINDOW 0 -50 21 Left 2 WINDOW 3 62 21 Left 2 SYMATTR InstName M22 SYMATTR Value N_1u SYMATTR Value2 l=1u w=10u SYMBOL pmos4 144 1664 M180 WINDOW 0 -16 -8 Left 2 WINDOW 3 36 31 Left 2 SYMATTR InstName M9 SYMATTR Value P_1u SYMATTR Value2 l=1u w=10u SYMBOL pmos4 432 1664 R180 WINDOW 0 -16 -8 Left 2 WINDOW 3 36 31 Left 2 SYMATTR InstName M10 SYMATTR Value P_1u SYMATTR Value2 l=1u w=10u SYMBOL pmos4 624 1664 R180 WINDOW 0 -16 -8 Left 2 WINDOW 3 36 31 Left 2 SYMATTR InstName M11 SYMATTR Value P_1u SYMATTR Value2 l=1u w=10u SYMBOL nmos4 240 1744 R0 WINDOW 0 -48 27 Left 2 WINDOW 3 62 21 Left 2 SYMATTR InstName M12 SYMATTR Value N_1u SYMATTR Value2 l=1u w=10u SYMBOL nmos4 240 1920 R0 WINDOW 0 -46 27 Left 2 WINDOW 3 62 21 Left 2 SYMATTR InstName M13 SYMATTR Value N_1u SYMATTR Value2 l=1u w=10u SYMBOL nmos4 240 2096 R0 WINDOW 0 -49 25 Left 2 WINDOW 3 62 21 Left 2 SYMATTR InstName M14 SYMATTR Value N_1u SYMATTR Value2 l=1u w=10u SYMBOL pmos4 976 1552 M180 WINDOW 0 -16 -8 Left 2 WINDOW 3 36 31 Left 2 SYMATTR InstName M23 SYMATTR Value P_1u SYMATTR Value2 l=1u w=10u SYMBOL pmos4 1264 1552 R180 WINDOW 0 -16 -8 Left 2 WINDOW 3 36 31 Left 2 SYMATTR InstName M24 SYMATTR Value P_1u SYMATTR Value2 l=1u w=10u SYMBOL nmos4 1072 1632 R0 WINDOW 0 -48 27 Left 2 WINDOW 3 62 21 Left 2 SYMATTR InstName M25 SYMATTR Value N_1u SYMATTR Value2 l=1u w=10u SYMBOL nmos4 1072 1808 R0 WINDOW 0 -46 21 Left 2 WINDOW 3 62 21 Left 2 SYMATTR InstName M26 SYMATTR Value N_1u SYMATTR Value2 l=1u w=10u SYMBOL pmos4 144 2720 M180 WINDOW 0 -16 -8 Left 2 WINDOW 3 36 31 Left 2 SYMATTR InstName M15 SYMATTR Value P_1u SYMATTR Value2 l=1u w=10u SYMBOL pmos4 432 2720 R180 WINDOW 0 -16 -8 Left 2 WINDOW 3 36 31 Left 2 SYMATTR InstName M16 SYMATTR Value P_1u SYMATTR Value2 l=1u w=10u SYMBOL nmos4 240 2800 R0 WINDOW 0 -52 28 Left 2 WINDOW 3 62 21 Left 2 SYMATTR InstName M17 SYMATTR Value N_1u SYMATTR Value2 l=1u w=10u SYMBOL nmos4 240 2976 R0 WINDOW 0 -49 28 Left 2 WINDOW 3 62 21 Left 2 SYMATTR InstName M18 SYMATTR Value N_1u SYMATTR Value2 l=1u w=10u TEXT -728 1680 Left 2 !.tran 0 20m 0 100u startup TEXT -728 1736 Left 2 !.options plotwinsize=0 numdgt=15 TEXT -1176 528 Left 2 !.MODEL N_1u NMOS LEVEL = 3\n+ TOX = 200E-10 NSUB = 1E17 GAMMA = 0.5 PHI = 0.7 VTO = 0.8 DELTA = 3.0 UO =

"Edward Rawde" snipped-for-privacy@invalid.invalid wrote in message news:113b7qe$2vml$ snipped-for-privacy@nnrp.usenet.blueworldhosting.com...

DTL works too, and you can mix it with CMOS. How many recent EE grads will think two diodes and a resistor if they need a very slow AND gate?

Version 4.1 SHEET 1 2452 3392 WIRE 384 -80 384 -112 WIRE 384 -80 240 -80 WIRE 384 -64 384 -80 WIRE 240 -48 240 -80 WIRE 144 64 32 64 WIRE 240 64 240 32 WIRE 240 64 208 64 WIRE 384 64 384 16 WIRE 560 64 384 64 WIRE 384 96 384 64 WIRE 144 144 96 144 WIRE 240 144 240 64 WIRE 240 144 208 144 WIRE 256 144 240 144 WIRE 384 240 384 192 WIRE 96 384 96 144 WIRE 560 384 560 64 WIRE 1056 544 1024 544 WIRE 1120 544 1120 480 WIRE 1120 544 1056 544 WIRE 1184 544 1120 544 WIRE 1216 544 1184 544 WIRE 96 560 560 384 WIRE 560 560 96 384 WIRE 1024 592 1024 544 WIRE 1216 592 1216 544 WIRE 976 608 928 608 WIRE 1328 608 1264 608 WIRE 1056 640 1056 544 WIRE 1056 640 1024 640 WIRE 1184 640 1184 544 WIRE 1216 640 1184 640 WIRE 384 704 384 672 WIRE 384 704 240 704 WIRE 384 720 384 704 WIRE 1024 720 1024 688 WIRE 1120 720 1024 720 WIRE 1216 720 1216 688 WIRE 1216 720 1120 720 WIRE 1392 720 1216 720 WIRE 1456 720 1392 720 WIRE 1648 720 1456 720 WIRE 240 736 240 704 WIRE 1120 768 1120 720 WIRE 1168 816 1120 816 WIRE 1168 832 1168 816 WIRE 96 848 96 560 WIRE 144 848 96 848 WIRE 240 848 240 816 WIRE 240 848 208 848 WIRE 384 848 384 800 WIRE 560 848 560 560 WIRE 560 848 384 848 WIRE 928 848 928 608 WIRE 928 848 560 848 WIRE 1072 848 928 848 WIRE 384 880 384 848 WIRE 1328 912 1328 608 WIRE 1328 912 928 912 WIRE 144 928 96 928 WIRE 240 928 240 848 WIRE 240 928 208 928 WIRE 256 928 240 928 WIRE 1120 944 1120 864 WIRE 1168 992 1120 992 WIRE 1168 1008 1168 992 WIRE 384 1024 384 976 WIRE 928 1024 928 912 WIRE 1072 1024 928 1024 WIRE 1120 1056 1120 1040 WIRE 928 1120 928 1024 WIRE 1392 1120 1392 720 WIRE 96 1152 96 928 WIRE 96 1152 -208 1152 WIRE 560 1216 560 848 WIRE -480 1296 -512 1296 WIRE -432 1296 -480 1296 WIRE 928 1296 1392 1120 WIRE 1392 1296 928 1120 WIRE -512 1344 -512 1296 WIRE 96 1392 560 1216 WIRE 1056 1408 1024 1408 WIRE 1120 1408 1120 1344 WIRE 1120 1408 1056 1408 WIRE 1184 1408 1120 1408 WIRE 1216 1408 1184 1408 WIRE 1024 1456 1024 1408 WIRE 1216 1456 1216 1408 WIRE -512 1472 -512 1424 WIRE 928 1472 928 1296 WIRE 976 1472 928 1472 WIRE 1328 1472 1264 1472 WIRE 1056 1504 1056 1408 WIRE 1056 1504 1024 1504 WIRE 1184 1504 1184 1408 WIRE 1216 1504 1184 1504 WIRE 224 1520 192 1520 WIRE 288 1520 288 1456 WIRE 288 1520 224 1520 WIRE 352 1520 288 1520 WIRE 384 1520 352 1520 WIRE 544 1520 384 1520 WIRE 576 1520 544 1520 WIRE 192 1568 192 1520 WIRE 384 1568 384 1520 WIRE 576 1568 576 1520 WIRE 96 1584 96 1392 WIRE 144 1584 96 1584 WIRE 496 1584 432 1584 WIRE 688 1584 624 1584 WIRE 1024 1584 1024 1552 WIRE 1120 1584 1024 1584 WIRE 1216 1584 1216 1552 WIRE 1216 1584 1120 1584 WIRE 1392 1584 1392 1296 WIRE 1392 1584 1216 1584 WIRE 1488 1584 1392 1584 WIRE 1648 1584 1488 1584 WIRE 224 1616 224 1520 WIRE 224 1616 192 1616 WIRE 352 1616 352 1520 WIRE 384 1616 352 1616 WIRE 544 1616 544 1520 WIRE 576 1616 544 1616 WIRE 1120 1632 1120 1584 WIRE 1168 1680 1120 1680 WIRE 192 1696 192 1664 WIRE 288 1696 192 1696 WIRE 384 1696 384 1664 WIRE 384 1696 288 1696 WIRE 576 1696 576 1664 WIRE 576 1696 384 1696 WIRE 768 1696 576 1696 WIRE 1168 1696 1168 1680 WIRE 928 1712 928 1472 WIRE 1072 1712 928 1712 WIRE 288 1744 288 1696 WIRE 1328 1776 1328 1472 WIRE 1328 1776 928 1776 WIRE 336 1792 288 1792 WIRE 336 1808 336 1792 WIRE 1120 1808 1120 1728 WIRE 96 1824 96 1584 WIRE 240 1824 96 1824 WIRE 1168 1856 1120 1856 WIRE 1168 1872 1168 1856 WIRE 496 1888 496 1584 WIRE 496 1888 96 1888 WIRE 768 1888 768 1696 WIRE 928 1888 928 1776 WIRE 928 1888 768 1888 WIRE 1072 1888 928 1888 WIRE 288 1920 288 1840 WIRE 1120 1920 1120 1904 WIRE 336 1968 288 1968 WIRE 336 1984 336 1968 WIRE -448 2000 -512 2000 WIRE -208 2000 -208 1152 WIRE -208 2000 -448 2000 WIRE 96 2000 96 1888 WIRE 96 2000 -208 2000 WIRE 240 2000 96 2000 WIRE 688 2064 688 1584 WIRE 688 2064 96 2064 WIRE -512 2096 -512 2000 WIRE 288 2096 288 2016 WIRE 336 2144 288 2144 WIRE 336 2160 336 2144 WIRE 96 2176 96 2064 WIRE 240 2176 96 2176 WIRE 288 2208 288 2192 WIRE -512 2240 -512 2176 WIRE 96 2272 96 2176 WIRE 768 2272 768 1888 WIRE 768 2272 560 2272 WIRE 96 2448 560 2272 WIRE 560 2448 96 2272 WIRE 224 2576 192 2576 WIRE 288 2576 288 2512 WIRE 288 2576 224 2576 WIRE 352 2576 288 2576 WIRE 384 2576 352 2576 WIRE 192 2624 192 2576 WIRE 384 2624 384 2576 WIRE 96 2640 96 2448 WIRE 144 2640 96 2640 WIRE 496 2640 432 2640 WIRE 224 2672 224 2576 WIRE 224 2672 192 2672 WIRE 352 2672 352 2576 WIRE 384 2672 352 2672 WIRE 192 2752 192 2720 WIRE 288 2752 192 2752 WIRE 384 2752 384 2720 WIRE 384 2752 288 2752 WIRE 560 2752 560 2448 WIRE 560 2752 384 2752 WIRE 288 2800 288 2752 WIRE 336 2848 288 2848 WIRE 336 2864 336 2848 WIRE 96 2880 96 2640 WIRE 240 2880 96 2880 WIRE 496 2944 496 2640 WIRE 496 2944 96 2944 WIRE 288 2976 288 2896 WIRE 336 3024 288 3024 WIRE 336 3040 336 3024 WIRE 96 3056 96 2944 WIRE 96 3056 -208 3056 WIRE 240 3056 96 3056 WIRE 288 3088 288 3072 WIRE 32 3152 32 64 WIRE 560 3152 560 2752 WIRE 560 3152 32 3152 WIRE -208 3264 -208 3056 WIRE 1648 3264 1648 1584 WIRE 1648 3264 -208 3264 FLAG -512 1472 0 FLAG -480 1296 Vdd FLAG 336 1808 0 FLAG 336 1984 0 FLAG 288 2208 0 FLAG 336 2160 0 FLAG 288 3088 0 FLAG 336 2864 0 FLAG 336 3040 0 FLAG 1120 1056 0 FLAG 1168 832 0 FLAG 1168 1008 0 FLAG 1120 1920 0 FLAG 1168 1696 0 FLAG 1168 1872 0 FLAG -512 2240 0 FLAG 1120 480 Vdd FLAG 288 1456 Vdd FLAG 1120 1344 Vdd FLAG 288 2512 Vdd FLAG -448 2000 Ck FLAG 1456 720 Q FLAG 1488 1584 Qbar FLAG 384 -112 Vdd FLAG 384 240 0 FLAG 384 672 Vdd FLAG 384 1024 0 SYMBOL voltage -512 1328 R0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V1 SYMATTR Value 5 SYMBOL voltage -512 2080 R0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V2 SYMATTR Value PULSE(0 5 0 10n 10n 1m 2m 10) SYMBOL pmos4 976 688 M180 WINDOW 0 -16 -8 Left 2 WINDOW 3 36 31 Left 2 SYMATTR InstName M19 SYMATTR Value P_1u SYMATTR Value2 l=1u w=10u SYMBOL pmos4 1264 688 R180 WINDOW 0 -16 -8 Left 2 WINDOW 3 36 31 Left 2 SYMATTR InstName M20 SYMATTR Value P_1u SYMATTR Value2 l=1u w=10u SYMBOL nmos4 1072 768 R0 WINDOW 0 -47 25 Left 2 WINDOW 3 62 21 Left 2 SYMATTR InstName M21 SYMATTR Value N_1u SYMATTR Value2 l=1u w=10u SYMBOL nmos4 1072 944 R0 WINDOW 0 -50 21 Left 2 WINDOW 3 62 21 Left 2 SYMATTR InstName M22 SYMATTR Value N_1u SYMATTR Value2 l=1u w=10u SYMBOL pmos4 144 1664 M180 WINDOW 0 -16 -8 Left 2 WINDOW 3 36 31 Left 2 SYMATTR InstName M9 SYMATTR Value P_1u SYMATTR Value2 l=1u w=10u SYMBOL pmos4 432 1664 R180 WINDOW 0 -16 -8 Left 2 WINDOW 3 36 31 Left 2 SYMATTR InstName M10 SYMATTR Value P_1u SYMATTR Value2 l=1u w=10u SYMBOL pmos4 624 1664 R180 WINDOW 0 -16 -8 Left 2 WINDOW 3 36 31 Left 2 SYMATTR InstName M11 SYMATTR Value P_1u SYMATTR Value2 l=1u w=10u SYMBOL nmos4 240 1744 R0 WINDOW 0 -48 27 Left 2 WINDOW 3 62 21 Left 2 SYMATTR InstName M12 SYMATTR Value N_1u SYMATTR Value2 l=1u w=10u SYMBOL nmos4 240 1920 R0 WINDOW 0 -46 27 Left 2 WINDOW 3 62 21 Left 2 SYMATTR InstName M13 SYMATTR Value N_1u SYMATTR Value2 l=1u w=10u SYMBOL nmos4 240 2096 R0 WINDOW 0 -49 25 Left 2 WINDOW 3 62 21 Left 2 SYMATTR InstName M14 SYMATTR Value N_1u SYMATTR Value2 l=1u w=10u SYMBOL pmos4 976 1552 M180 WINDOW 0 -16 -8 Left 2 WINDOW 3 36 31 Left 2 SYMATTR InstName M23 SYMATTR Value P_1u SYMATTR Value2 l=1u w=10u SYMBOL pmos4 1264 1552 R180 WINDOW 0 -16 -8 Left 2 WINDOW 3 36 31 Left 2 SYMATTR InstName M24 SYMATTR Value P_1u SYMATTR Value2 l=1u w=10u SYMBOL nmos4 1072 1632 R0 WINDOW 0 -48 27 Left 2 WINDOW 3 62 21 Left 2 SYMATTR InstName M25 SYMATTR Value N_1u SYMATTR Value2 l=1u w=10u SYMBOL nmos4 1072 1808 R0 WINDOW 0 -46 21 Left 2 WINDOW 3 62 21 Left 2 SYMATTR InstName M26 SYMATTR Value N_1u SYMATTR Value2 l=1u w=10u SYMBOL pmos4 144 2720 M180 WINDOW 0 -16 -8 Left 2 WINDOW 3 36 31 Left 2 SYMATTR InstName M15 SYMATTR Value P_1u SYMATTR Value2 l=1u w=10u SYMBOL pmos4 432 2720 R180 WINDOW 0 -16 -8 Left 2 WINDOW 3 36 31 Left 2 SYMATTR InstName M16 SYMATTR Value P_1u SYMATTR Value2 l=1u w=10u SYMBOL nmos4 240 2800 R0 WINDOW 0 -52 28 Left 2 WINDOW 3 62 21 Left 2 SYMATTR InstName M17 SYMATTR Value N_1u SYMATTR Value2 l=1u w=10u SYMBOL nmos4 240 2976 R0 WINDOW 0 -49 28 Left 2 WINDOW 3 62 21 Left 2 SYMATTR InstName M18 SYMATTR Value N_1u SYMATTR Value2 l=1u w=10u SYMBOL npn 320 96 R0 SYMATTR InstName Q1 SYMATTR Value 2N3904 SYMBOL res 368 -80 R0 SYMATTR InstName R1 SYMATTR Value 1k SYMBOL diode 208 48 R90 WINDOW 0 0 32 VBottom 2 WINDOW 3 32 32 VTop 2 SYMATTR InstName D1 SYMATTR Value 1N4148 SYMBOL diode 208 128 R90 WINDOW 0 0 32 VBottom 2 WINDOW 3 32 32 VTop 2 SYMATTR InstName D2 SYMATTR Value 1N4148 SYMBOL res 256 -64 M0 SYMATTR InstName R2 SYMATTR Value 10k SYMBOL diode 256 160 R270 WINDOW 0 32 32 VTop 2 WINDOW 3 0 32 VBottom 2 SYMATTR InstName D3 SYMATTR Value 1N4148 SYMBOL npn 320 880 R0 SYMATTR InstName Q2 SYMATTR Value 2N3904 SYMBOL res 368 704 R0 SYMATTR InstName R3 SYMATTR Value 1k SYMBOL diode 208 832 R90 WINDOW 0 0 32 VBottom 2 WINDOW 3 32 32 VTop 2 SYMATTR InstName D4 SYMATTR Value 1N4148 SYMBOL diode 208 912 R90 WINDOW 0 0 32 VBottom 2 WINDOW 3 32 32 VTop 2 SYMATTR InstName D5 SYMATTR Value 1N4148 SYMBOL res 256 720 M0 SYMATTR InstName R4 SYMATTR Value 10k SYMBOL diode 256 944 R270 WINDOW 0 32 32 VTop 2 WINDOW 3 0 32 VBottom 2 SYMATTR InstName D6 SYMATTR Value 1N4148 TEXT -728 1680 Left 2 !.tran 0 20m 0 100u startup TEXT -728 1736 Left 2 !.options plotwinsize=0 numdgt=15 TEXT -1176 528 Left 2 !.MODEL N_1u NMOS LEVEL = 3\n+ TOX = 200E-10 NSUB = 1E17 GAMMA = 0.5 PHI = 0.7 VTO = 0.8 DELTA = 3.0 UO =

None of which you can articulate, because you don't seem to understand what is going on.

And only ignorant lunatic would waste our time mentioning it.

The paper to which you posted a link, about the National Ignition Lab made it perfect clear that the author thought that their gear provided a common clock for the entire foot-ball stadium sized lab, with tight jitter specs much shorter than the propagation time across the facility.

You don't seem to be able to understand what this involved. It certainly isn't serving up the same clock to any of the D-type bistables involved.

Again, a lunatic misunderstanding of what is being discussed.

I lived in England for 22 years and resisted the temptation. I did visit the Royal Society once when my wife was being inducted as a fellow - the process spread over three days and was a lot of fun. The fact that my post-doc supervisor got in in the same batch added a little.

Ray Dyson - the vacuum cleaner man - got an honorary fellowship in that same batch - but we didn't know at the time that his brother had been a friend of ours in Cambridge.

That's basically the standard D flip-flop, however, I didn't ask for a transistor level implementation! The point of the challenge was to show the use of asynchronous logic at the gate level.

That said, I have a 13-gate divide-by-three design which I tried to simulate in LTspice. Although it *does* divide by three, it also contains a flaw which I haven't fixed yet. More later.

Jeroen Belleman

The hundreds of VME modules are frequency-locked to the master timing signal, but certainly don't align their logic clocks in time. The speed of light prevents that.

There is actually no explicit clock sent out. The VME clients lock their local clocks by observing the data stream.

Of course I understand the NIF timing system. I helped design it and designed the VME modules.

Curious.

Brave of you to resist temptation.

There's an RAF museum north of London that you are lucky to have avoided too.

I tried using the nand gates in LTSpice but couldn't get a circuit equivalent to the one I posted to work. Not sure what I'm doing wrong. Do you have a working 6-gate edge triggered d-type in LTSpice using the nand gates under Digital "and" (makes nand or and)?

Divide by 3 in 13 gates sounds like a challenge. I'd set up two d-types with the relevant feedback and then look for simplifications such as multi-level combinatorial methods.

Why feed the troll? They live for attention.

Joe

"Jeroen Belleman" snipped-for-privacy@nospam.please wrote in message news:113doge$2v1co$ snipped-for-privacy@dont-email.me...

Here's divide by 3 in CMOS in 13 gates. It does make certain assumptions so please tell me whether those are cheating or not. There's also a simulation warning but it doesn't stop it simulating. I'll do it in LTSpice gates when I can get them to work.

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2560 -16 WIRE 2832 -16 2656 -16 WIRE 288 32 288 -16 WIRE 2560 32 2560 -16 WIRE 336 80 288 80 WIRE 2608 80 2560 80 WIRE 336 96 336 80 WIRE 2608 96 2608 80 WIRE 96 112 96 -128 WIRE 96 112 32 112 WIRE 240 112 96 112 WIRE 2368 112 2368 -128 WIRE 2368 112 2304 112 WIRE 2512 112 2368 112 WIRE 496 176 496 -128 WIRE 496 176 96 176 WIRE 2768 176 2768 -128 WIRE 2768 176 2368 176 WIRE 288 208 288 128 WIRE 2560 208 2560 128 WIRE 336 256 288 256 WIRE 2608 256 2560 256 WIRE 336 272 336 256 WIRE 2608 272 2608 256 WIRE 96 288 96 176 WIRE 240 288 96 288 WIRE 2368 288 2368 176 WIRE 2512 288 2368 288 WIRE 288 320 288 304 WIRE 2560 320 2560 304 WIRE 96 384 96 288 WIRE 560 384 560 -16 WIRE 2368 384 2368 288 WIRE 2832 384 2832 -16 WIRE 1056 544 1024 544 WIRE 1120 544 1120 480 WIRE 1120 544 1056 544 WIRE 1184 544 1120 544 WIRE 1216 544 1184 544 WIRE 3328 544 3296 544 WIRE 3392 544 3392 480 WIRE 3392 544 3328 544 WIRE 3456 544 3392 544 WIRE 3488 544 3456 544 WIRE 96 560 560 384 WIRE 560 560 96 384 WIRE 2368 560 2832 384 WIRE 2832 560 2368 384 WIRE 1024 592 1024 544 WIRE 1216 592 1216 544 WIRE 3296 592 3296 544 WIRE 3488 592 3488 544 WIRE 976 608 928 608 WIRE 1328 608 1264 608 WIRE 3248 608 3200 608 WIRE 3600 608 3536 608 WIRE 1056 640 1056 544 WIRE 1056 640 1024 640 WIRE 1184 640 1184 544 WIRE 1216 640 1184 640 WIRE 3328 640 3328 544 WIRE 3328 640 3296 640 WIRE 3456 640 3456 544 WIRE 3488 640 3456 640 WIRE 224 672 192 672 WIRE 288 672 288 608 WIRE 288 672 224 672 WIRE 352 672 288 672 WIRE 384 672 352 672 WIRE 2496 672 2464 672 WIRE 2560 672 2560 608 WIRE 2560 672 2496 672 WIRE 2624 672 2560 672 WIRE 2656 672 2624 672 WIRE 192 720 192 672 WIRE 384 720 384 672 WIRE 1024 720 1024 688 WIRE 1120 720 1024 720 WIRE 1216 720 1216 688 WIRE 1216 720 1120 720 WIRE 1392 720 1216 720 WIRE 1456 720 1392 720 WIRE 1872 720 1456 720 WIRE 2464 720 2464 672 WIRE 2656 720 2656 672 WIRE 3296 720 3296 688 WIRE 3392 720 3296 720 WIRE 3488 720 3488 688 WIRE 3488 720 3392 720 WIRE 3664 720 3488 720 WIRE 3728 720 3664 720 WIRE 3920 720 3728 720 WIRE 96 736 96 560 WIRE 144 736 96 736 WIRE 496 736 432 736 WIRE 2368 736 2368 560 WIRE 2416 736 2368 736 WIRE 2768 736 2704 736 WIRE 224 768 224 672 WIRE 224 768 192 768 WIRE 352 768 352 672 WIRE 384 768 352 768 WIRE 1120 768 1120 720 WIRE 2496 768 2496 672 WIRE 2496 768 2464 768 WIRE 2624 768 2624 672 WIRE 2656 768 2624 768 WIRE 3392 768 3392 720 WIRE 1168 816 1120 816 WIRE 3440 816 3392 816 WIRE 1168 832 1168 816 WIRE 3440 832 3440 816 WIRE 192 848 192 816 WIRE 288 848 192 848 WIRE 384 848 384 816 WIRE 384 848 288 848 WIRE 560 848 560 560 WIRE 560 848 384 848 WIRE 928 848 928 608 WIRE 928 848 560 848 WIRE 1072 848 928 848 WIRE 2464 848 2464 816 WIRE 2560 848 2464 848 WIRE 2656 848 2656 816 WIRE 2656 848 2560 848 WIRE 2832 848 2832 560 WIRE 2832 848 2656 848 WIRE 3200 848 3200 608 WIRE 3200 848 2832 848 WIRE 3344 848 3200 848 WIRE 288 896 288 848 WIRE 2560 896 2560 848 WIRE 1328 912 1328 608 WIRE 1328 912 928 912 WIRE 3600 912 3600 608 WIRE 3600 912 3200 912 WIRE 336 944 288 944 WIRE 1120 944 1120 864 WIRE 2608 944 2560 944 WIRE 3392 944 3392 864 WIRE 336 960 336 944 WIRE 2608 960 2608 944 WIRE 96 976 96 736 WIRE 240 976 96 976 WIRE 2368 976 2368 736 WIRE 2512 976 2368 976 WIRE 1168 992 1120 992 WIRE 3440 992 3392 992 WIRE 1168 1008 1168 992 WIRE 3440 1008 3440 992 WIRE 928 1024 928 912 WIRE 1072 1024 928 1024 WIRE 3200 1024 3200 912 WIRE 3344 1024 3200 1024 WIRE 496 1040 496 736 WIRE 496 1040 96 1040 WIRE 2768 1040 2768 736 WIRE 2768 1040 2368 1040 WIRE 1120 1056 1120 1040 WIRE 3392 1056 3392 1040 WIRE 288 1072 288 992 WIRE 2560 1072 2560 992 WIRE 336 1120 288 1120 WIRE 928 1120 928 1024 WIRE 1392 1120 1392 720 WIRE 2608 1120 2560 1120 WIRE 3200 1120 3200 1024 WIRE 3664 1120 3664 720 WIRE 336 1136 336 1120 WIRE 2608 1136 2608 1120 WIRE 96 1152 96 1040 WIRE 96 1152 -640 1152 WIRE 240 1152 96 1152 WIRE 2368 1152 2368 1040 WIRE 2368 1152 2000 1152 WIRE 2512 1152 2368 1152 WIRE 288 1184 288 1168 WIRE 2560 1184 2560 1168 WIRE 560 1216 560 848 WIRE 2832 1216 2832 848 WIRE -880 1264 -912 1264 WIRE -832 1264 -880 1264 WIRE 928 1296 1392 1120 WIRE 1392 1296 928 1120 WIRE 3200 1296 3664 1120 WIRE 3664 1296 3200 1120 WIRE -912 1312 -912 1264 WIRE 96 1392 560 1216 WIRE 2368 1392 2832 1216 WIRE 1056 1408 1024 1408 WIRE 1120 1408 1120 1344 WIRE 1120 1408 1056 1408 WIRE 1184 1408 1120 1408 WIRE 1216 1408 1184 1408 WIRE 3328 1408 3296 1408 WIRE 3392 1408 3392 1344 WIRE 3392 1408 3328 1408 WIRE 3456 1408 3392 1408 WIRE 3488 1408 3456 1408 WIRE -912 1440 -912 1392 WIRE 1024 1456 1024 1408 WIRE 1216 1456 1216 1408 WIRE 3296 1456 3296 1408 WIRE 3488 1456 3488 1408 WIRE 928 1472 928 1296 WIRE 976 1472 928 1472 WIRE 1328 1472 1264 1472 WIRE 3200 1472 3200 1296 WIRE 3248 1472 3200 1472 WIRE 3600 1472 3536 1472 WIRE 1056 1504 1056 1408 WIRE 1056 1504 1024 1504 WIRE 1184 1504 1184 1408 WIRE 1216 1504 1184 1504 WIRE 3328 1504 3328 1408 WIRE 3328 1504 3296 1504 WIRE 3456 1504 3456 1408 WIRE 3488 1504 3456 1504 WIRE 224 1520 192 1520 WIRE 288 1520 288 1456 WIRE 288 1520 224 1520 WIRE 352 1520 288 1520 WIRE 384 1520 352 1520 WIRE 544 1520 384 1520 WIRE 576 1520 544 1520 WIRE 2496 1520 2464 1520 WIRE 2560 1520 2560 1456 WIRE 2560 1520 2496 1520 WIRE 2624 1520 2560 1520 WIRE 2656 1520 2624 1520 WIRE 2816 1520 2656 1520 WIRE 2848 1520 2816 1520 WIRE 192 1568 192 1520 WIRE 384 1568 384 1520 WIRE 576 1568 576 1520 WIRE 2464 1568 2464 1520 WIRE 2656 1568 2656 1520 WIRE 2848 1568 2848 1520 WIRE 96 1584 96 1392 WIRE 144 1584 96 1584 WIRE 496 1584 432 1584 WIRE 688 1584 624 1584 WIRE 1024 1584 1024 1552 WIRE 1120 1584 1024 1584 WIRE 1216 1584 1216 1552 WIRE 1216 1584 1120 1584 WIRE 1392 1584 1392 1296 WIRE 1392 1584 1216 1584 WIRE 1488 1584 1392 1584 WIRE 1648 1584 1648 -224 WIRE 1648 1584 1488 1584 WIRE 2368 1584 2368 1392 WIRE 2416 1584 2368 1584 WIRE 2768 1584 2704 1584 WIRE 2960 1584 2896 1584 WIRE 3296 1584 3296 1552 WIRE 3392 1584 3296 1584 WIRE 3488 1584 3488 1552 WIRE 3488 1584 3392 1584 WIRE 3664 1584 3664 1296 WIRE 3664 1584 3488 1584 WIRE 3760 1584 3664 1584 WIRE 4064 1584 4064 -400 WIRE 4064 1584 3760 1584 WIRE 224 1616 224 1520 WIRE 224 1616 192 1616 WIRE 352 1616 352 1520 WIRE 384 1616 352 1616 WIRE 544 1616 544 1520 WIRE 576 1616 544 1616 WIRE 2496 1616 2496 1520 WIRE 2496 1616 2464 1616 WIRE 2624 1616 2624 1520 WIRE 2656 1616 2624 1616 WIRE 2816 1616 2816 1520 WIRE 2848 1616 2816 1616 WIRE 1120 1632 1120 1584 WIRE 3392 1632 3392 1584 WIRE 1168 1680 1120 1680 WIRE 3440 1680 3392 1680 WIRE 192 1696 192 1664 WIRE 288 1696 192 1696 WIRE 384 1696 384 1664 WIRE 384 1696 288 1696 WIRE 576 1696 576 1664 WIRE 576 1696 384 1696 WIRE 768 1696 576 1696 WIRE 1168 1696 1168 1680 WIRE 2464 1696 2464 1664 WIRE 2560 1696 2464 1696 WIRE 2656 1696 2656 1664 WIRE 2656 1696 2560 1696 WIRE 2848 1696 2848 1664 WIRE 2848 1696 2656 1696 WIRE 3040 1696 2848 1696 WIRE 3440 1696 3440 1680 WIRE 928 1712 928 1472 WIRE 1072 1712 928 1712 WIRE 3200 1712 3200 1472 WIRE 3344 1712 3200 1712 WIRE 288 1744 288 1696 WIRE 2560 1744 2560 1696 WIRE 1328 1776 1328 1472 WIRE 1328 1776 928 1776 WIRE 3600 1776 3600 1472 WIRE 3600 1776 3200 1776 WIRE 336 1792 288 1792 WIRE 2608 1792 2560 1792 WIRE 336 1808 336 1792 WIRE 1120 1808 1120 1728 WIRE 2608 1808 2608 1792 WIRE 3392 1808 3392 1728 WIRE 96 1824 96 1584 WIRE 240 1824 96 1824 WIRE 2368 1824 2368 1584 WIRE 2512 1824 2368 1824 WIRE 1168 1856 1120 1856 WIRE 3440 1856 3392 1856 WIRE 1168 1872 1168 1856 WIRE 3440 1872 3440 1856 WIRE 496 1888 496 1584 WIRE 496 1888 96 1888 WIRE 768 1888 768 1696 WIRE 928 1888 928 1776 WIRE 928 1888 768 1888 WIRE 1072 1888 928 1888 WIRE 2768 1888 2768 1584 WIRE 2768 1888 2368 1888 WIRE 3040 1888 3040 1696 WIRE 3200 1888 3200 1776 WIRE 3200 1888 3040 1888 WIRE 3344 1888 3200 1888 WIRE 288 1920 288 1840 WIRE 1120 1920 1120 1904 WIRE 2560 1920 2560 1840 WIRE 3392 1920 3392 1904 WIRE 336 1968 288 1968 WIRE 2608 1968 2560 1968 WIRE 336 1984 336 1968 WIRE 2608 1984 2608 1968 WIRE -640 2000 -640 1152 WIRE 96 2000 96 1888 WIRE 96 2000 -640 2000 WIRE 240 2000 96 2000 WIRE 2000 2000 2000 1152 WIRE 2368 2000 2368 1888 WIRE 2368 2000 2000 2000 WIRE 2512 2000 2368 2000 WIRE 688 2064 688 1584 WIRE 688 2064 96 2064 WIRE 2960 2064 2960 1584 WIRE 2960 2064 2368 2064 WIRE 288 2096 288 2016 WIRE 2560 2096 2560 2016 WIRE 336 2144 288 2144 WIRE 2608 2144 2560 2144 WIRE 336 2160 336 2144 WIRE 2608 2160 2608 2144 WIRE -976 2176 -1040 2176 WIRE -640 2176 -640 2000 WIRE -640 2176 -976 2176 WIRE 96 2176 96 2064 WIRE 240 2176 96 2176 WIRE 2368 2176 2368 2064 WIRE 2512 2176 2368 2176 WIRE 288 2208 288 2192 WIRE 2560 2208 2560 2192 WIRE -1040 2272 -1040 2176 WIRE 96 2272 96 2176 WIRE 768 2272 768 1888 WIRE 768 2272 560 2272 WIRE 2368 2272 2368 2176 WIRE 3040 2272 3040 1888 WIRE 3040 2272 2832 2272 WIRE -1040 2416 -1040 2352 WIRE 96 2448 560 2272 WIRE 560 2448 96 2272 WIRE 2368 2448 2832 2272 WIRE 2832 2448 2368 2272 WIRE 224 2576 192 2576 WIRE 288 2576 288 2512 WIRE 288 2576 224 2576 WIRE 352 2576 288 2576 WIRE 384 2576 352 2576 WIRE 2496 2576 2464 2576 WIRE 2560 2576 2560 2512 WIRE 2560 2576 2496 2576 WIRE 2624 2576 2560 2576 WIRE 2656 2576 2624 2576 WIRE 192 2624 192 2576 WIRE 384 2624 384 2576 WIRE 2464 2624 2464 2576 WIRE 2656 2624 2656 2576 WIRE 96 2640 96 2448 WIRE 144 2640 96 2640 WIRE 496 2640 432 2640 WIRE 2368 2640 2368 2448 WIRE 2416 2640 2368 2640 WIRE 2768 2640 2704 2640 WIRE 224 2672 224 2576 WIRE 224 2672 192 2672 WIRE 352 2672 352 2576 WIRE 384 2672 352 2672 WIRE 2496 2672 2496 2576 WIRE 2496 2672 2464 2672 WIRE 2624 2672 2624 2576 WIRE 2656 2672 2624 2672 WIRE 192 2752 192 2720 WIRE 288 2752 192 2752 WIRE 384 2752 384 2720 WIRE 384 2752 288 2752 WIRE 560 2752 560 2448 WIRE 560 2752 384 2752 WIRE 2464 2752 2464 2720 WIRE 2560 2752 2464 2752 WIRE 2656 2752 2656 2720 WIRE 2656 2752 2560 2752 WIRE 2832 2752 2832 2448 WIRE 2832 2752 2656 2752 WIRE 288 2800 288 2752 WIRE 2560 2800 2560 2752 WIRE 336 2848 288 2848 WIRE 2608 2848 2560 2848 WIRE 336 2864 336 2848 WIRE 2608 2864 2608 2848 WIRE 96 2880 96 2640 WIRE 240 2880 96 2880 WIRE 2368 2880 2368 2640 WIRE 2512 2880 2368 2880 WIRE 496 2944 496 2640 WIRE 496 2944 96 2944 WIRE 2768 2944 2768 2640 WIRE 2768 2944 2368 2944 WIRE 288 2976 288 2896 WIRE 2560 2976 2560 2896 WIRE 336 3024 288 3024 WIRE 2608 3024 2560 3024 WIRE 336 3040 336 3024 WIRE 2608 3040 2608 3024 WIRE -96 3056 -96 -528 WIRE 96 3056 96 2944 WIRE 96 3056 -96 3056 WIRE 240 3056 96 3056 WIRE 1872 3056 1872 720 WIRE 2368 3056 2368 2944 WIRE 2368 3056 1872 3056 WIRE 2512 3056 2368 3056 WIRE 288 3088 288 3072 WIRE 2560 3088 2560 3072 WIRE 32 3152 32 112 WIRE 560 3152 560 2752 WIRE 560 3152 32 3152 WIRE 2304 3152 2304 112 WIRE 2832 3152 2832 2752 WIRE 2832 3152 2304 3152 WIRE -640 3248 -640 2176 WIRE 2000 3248 2000 2000 WIRE 2000 3248 -640 3248 FLAG -912 1440 0 FLAG -880 1264 Vdd FLAG 288 -256 Vdd FLAG 288 320 0 FLAG 336 96 0 FLAG 336 272 0 FLAG 288 1184 0 FLAG 336 960 0 FLAG 336 1136 0 FLAG 336 1808 0 FLAG 336 1984 0 FLAG 288 2208 0 FLAG 336 2160 0 FLAG 288 3088 0 FLAG 336 2864 0 FLAG 336 3040 0 FLAG 1120 1056 0 FLAG 1168 832 0 FLAG 1168 1008 0 FLAG 1120 1920 0 FLAG 1168 1696 0 FLAG 1168 1872 0 FLAG -1040 2416 0 FLAG 288 608 Vdd FLAG 1120 480 Vdd FLAG 288 1456 Vdd FLAG 1120 1344 Vdd FLAG 288 2512 Vdd FLAG -976 2176 Ck FLAG 1456 720 Q0 FLAG 1488 1584 Qbar0 FLAG 2560 -256 Vdd FLAG 2560 320 0 FLAG 2608 96 0 FLAG 2608 272 0 FLAG 2560 1184 0 FLAG 2608 960 0 FLAG 2608 1136 0 FLAG 2608 1808 0 FLAG 2608 1984 0 FLAG 2560 2208 0 FLAG 2608 2160 0 FLAG 2560 3088 0 FLAG 2608 2864 0 FLAG 2608 3040 0 FLAG 3392 1056 0 FLAG 3440 832 0 FLAG 3440 1008 0 FLAG 3392 1920 0 FLAG 3440 1696 0 FLAG 3440 1872 0 FLAG 2560 608 Vdd FLAG 3392 480 Vdd FLAG 2560 1456 Vdd FLAG 3392 1344 Vdd FLAG 2560 2512 Vdd FLAG 3728 720 Q1 FLAG 3760 1584 Qbar1 FLAG 1248 -768 Vdd FLAG 1248 -192 0 FLAG 1200 -416 0 FLAG 1200 -240 0 FLAG 832 -416 0 FLAG 880 -352 0 FLAG 880 -768 Vdd SYMBOL voltage -912 1296 R0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V1 SYMATTR Value 5 SYMBOL voltage -1040 2256 R0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V2 SYMATTR Value PULSE(0 5 0 10n 10n 1m 2m 10) SYMBOL pmos4 144 -48 M180 WINDOW 0 -16 -8 Left 2 WINDOW 3 36 31 Left 2 SYMATTR InstName M1 SYMATTR Value P_1u SYMATTR Value2 l=1u w=10u SYMBOL pmos4 432 -48 R180 WINDOW 0 -16 -8 Left 2 WINDOW 3 36 31 Left 2 SYMATTR InstName M2 SYMATTR Value P_1u SYMATTR Value2 l=1u w=10u SYMBOL nmos4 240 32 R0 WINDOW 0 -41 27 Left 2 WINDOW 3 62 21 Left 2 SYMATTR InstName M3 SYMATTR Value N_1u SYMATTR Value2 l=1u w=10u SYMBOL nmos4 240 208 R0 WINDOW 0 -41 27 Left 2 WINDOW 3 62 21 Left 2 SYMATTR InstName M4 SYMATTR Value N_1u SYMATTR Value2 l=1u w=10u SYMBOL pmos4 144 816 M180 WINDOW 0 -16 -8 Left 2 WINDOW 3 36 31 Left 2 SYMATTR InstName M5 SYMATTR Value P_1u SYMATTR Value2 l=1u w=10u SYMBOL pmos4 432 816 R180 WINDOW 0 -16 -8 Left 2 WINDOW 3 36 31 Left 2 SYMATTR InstName M6 SYMATTR Value P_1u SYMATTR Value2 l=1u w=10u SYMBOL nmos4 240 896 R0 WINDOW 0 -41 27 Left 2 WINDOW 3 62 21 Left 2 SYMATTR InstName M7 SYMATTR Value N_1u SYMATTR Value2 l=1u w=10u SYMBOL nmos4 240 1072 R0 WINDOW 0 -41 27 Left 2 WINDOW 3 62 21 Left 2 SYMATTR InstName M8 SYMATTR Value N_1u SYMATTR Value2 l=1u w=10u SYMBOL pmos4 976 688 M180 WINDOW 0 -16 -8 Left 2 WINDOW 3 36 31 Left 2 SYMATTR InstName M19 SYMATTR Value P_1u SYMATTR Value2 l=1u w=10u SYMBOL pmos4 1264 688 R180 WINDOW 0 -16 -8 Left 2 WINDOW 3 36 31 Left 2 SYMATTR InstName M20 SYMATTR Value P_1u SYMATTR Value2 l=1u w=10u SYMBOL nmos4 1072 768 R0 WINDOW 0 -47 25 Left 2 WINDOW 3 62 21 Left 2 SYMATTR InstName M21 SYMATTR Value N_1u SYMATTR Value2 l=1u w=10u SYMBOL nmos4 1072 944 R0 WINDOW 0 -50 21 Left 2 WINDOW 3 62 21 Left 2 SYMATTR InstName M22 SYMATTR Value N_1u SYMATTR Value2 l=1u w=10u SYMBOL pmos4 144 1664 M180 WINDOW 0 -16 -8 Left 2 WINDOW 3 36 31 Left 2 SYMATTR InstName M9 SYMATTR Value P_1u SYMATTR Value2 l=1u w=10u SYMBOL pmos4 432 1664 R180 WINDOW 0 -16 -8 Left 2 WINDOW 3 36 31 Left 2 SYMATTR InstName M10 SYMATTR Value P_1u SYMATTR Value2 l=1u w=10u SYMBOL pmos4 624 1664 R180 WINDOW 0 -16 -8 Left 2 WINDOW 3 36 31 Left 2 SYMATTR InstName M11 SYMATTR Value P_1u SYMATTR Value2 l=1u w=10u SYMBOL nmos4 240 1744 R0 WINDOW 0 -48 27 Left 2 WINDOW 3 62 21 Left 2 SYMATTR InstName M12 SYMATTR Value N_1u SYMATTR Value2 l=1u w=10u SYMBOL nmos4 240 1920 R0 WINDOW 0 -46 27 Left 2 WINDOW 3 62 21 Left 2 SYMATTR InstName M13 SYMATTR Value N_1u SYMATTR Value2 l=1u w=10u SYMBOL nmos4 240 2096 R0 WINDOW 0 -49 25 Left 2 WINDOW 3 62 21 Left 2 SYMATTR InstName M14 SYMATTR Value N_1u SYMATTR Value2 l=1u w=10u SYMBOL pmos4 976 1552 M180 WINDOW 0 -16 -8 Left 2 WINDOW 3 36 31 Left 2 SYMATTR InstName M23 SYMATTR Value P_1u SYMATTR Value2 l=1u w=10u SYMBOL pmos4 1264 1552 R180 WINDOW 0 -16 -8 Left 2 WINDOW 3 36 31 Left 2 SYMATTR InstName M24 SYMATTR Value P_1u SYMATTR Value2 l=1u w=10u SYMBOL nmos4 1072 1632 R0 WINDOW 0 -48 27 Left 2 WINDOW 3 62 21 Left 2 SYMATTR InstName M25 SYMATTR Value N_1u SYMATTR Value2 l=1u w=10u SYMBOL nmos4 1072 1808 R0 WINDOW 0 -46 21 Left 2 WINDOW 3 62 21 Left 2 SYMATTR InstName M26 SYMATTR Value N_1u SYMATTR Value2 l=1u w=10u SYMBOL pmos4 144 2720 M180 WINDOW 0 -16 -8 Left 2 WINDOW 3 36 31 Left 2 SYMATTR InstName M15 SYMATTR Value P_1u SYMATTR Value2 l=1u w=10u SYMBOL pmos4 432 2720 R180 WINDOW 0 -16 -8 Left 2 WINDOW 3 36 31 Left 2 SYMATTR InstName M16 SYMATTR Value P_1u SYMATTR Value2 l=1u w=10u SYMBOL nmos4 240 2800 R0 WINDOW 0 -52 28 Left 2 WINDOW 3 62 21 Left 2 SYMATTR InstName M17 SYMATTR Value N_1u SYMATTR Value2 l=1u w=10u SYMBOL nmos4 240 2976 R0 WINDOW 0 -49 28 Left 2 WINDOW 3 62 21 Left 2 SYMATTR InstName M18 SYMATTR Value N_1u SYMATTR Value2 l=1u w=10u SYMBOL pmos4 2416 -48 M180 WINDOW 0 -16 -8 Left 2 WINDOW 3 36 31 Left 2 SYMATTR InstName M27 SYMATTR Value P_1u SYMATTR Value2 l=1u w=10u SYMBOL pmos4 2704 -48 R180 WINDOW 0 -16 -8 Left 2 WINDOW 3 36 31 Left 2 SYMATTR InstName M28 SYMATTR Value P_1u SYMATTR Value2 l=1u w=10u SYMBOL nmos4 2512 32 R0 WINDOW 0 -41 27 Left 2 WINDOW 3 62 21 Left 2 SYMATTR InstName M29 SYMATTR Value N_1u SYMATTR Value2 l=1u w=10u SYMBOL nmos4 2512 208 R0 WINDOW 0 -41 27 Left 2 WINDOW 3 62 21 Left 2 SYMATTR InstName M30 SYMATTR Value N_1u SYMATTR Value2 l=1u w=10u SYMBOL pmos4 2416 816 M180 WINDOW 0 -16 -8 Left 2 WINDOW 3 36 31 Left 2 SYMATTR InstName M31 SYMATTR Value P_1u SYMATTR Value2 l=1u w=10u SYMBOL pmos4 2704 816 R180 WINDOW 0 -16 -8 Left 2 WINDOW 3 36 31 Left 2 SYMATTR InstName M32 SYMATTR Value P_1u SYMATTR Value2 l=1u w=10u SYMBOL nmos4 2512 896 R0 WINDOW 0 -41 27 Left 2 WINDOW 3 62 21 Left 2 SYMATTR InstName M33 SYMATTR Value N_1u SYMATTR Value2 l=1u w=10u SYMBOL nmos4 2512 1072 R0 WINDOW 0 -41 27 Left 2 WINDOW 3 62 21 Left 2 SYMATTR InstName M34 SYMATTR Value N_1u SYMATTR Value2 l=1u w=10u SYMBOL pmos4 3248 688 M180 WINDOW 0 -16 -8 Left 2 WINDOW 3 36 31 Left 2 SYMATTR InstName M35 SYMATTR Value P_1u SYMATTR Value2 l=1u w=10u SYMBOL pmos4 3536 688 R180 WINDOW 0 -16 -8 Left 2 WINDOW 3 36 31 Left 2 SYMATTR InstName M36 SYMATTR Value P_1u SYMATTR Value2 l=1u w=10u SYMBOL nmos4 3344 768 R0 WINDOW 0 -47 25 Left 2 WINDOW 3 62 21 Left 2 SYMATTR InstName M37 SYMATTR Value N_1u SYMATTR Value2 l=1u w=10u SYMBOL nmos4 3344 944 R0 WINDOW 0 -50 21 Left 2 WINDOW 3 62 21 Left 2 SYMATTR InstName M38 SYMATTR Value N_1u SYMATTR Value2 l=1u w=10u SYMBOL pmos4 2416 1664 M180 WINDOW 0 -16 -8 Left 2 WINDOW 3 36 31 Left 2 SYMATTR InstName M39 SYMATTR Value P_1u SYMATTR Value2 l=1u w=10u SYMBOL pmos4 2704 1664 R180 WINDOW 0 -16 -8 Left 2 WINDOW 3 36 31 Left 2 SYMATTR InstName M40 SYMATTR Value P_1u SYMATTR Value2 l=1u w=10u SYMBOL pmos4 2896 1664 R180 WINDOW 0 -16 -8 Left 2 WINDOW 3 36 31 Left 2 SYMATTR InstName M41 SYMATTR Value P_1u SYMATTR Value2 l=1u w=10u SYMBOL nmos4 2512 1744 R0 WINDOW 0 -48 27 Left 2 WINDOW 3 62 21 Left 2 SYMATTR InstName M42 SYMATTR Value N_1u SYMATTR Value2 l=1u w=10u SYMBOL nmos4 2512 1920 R0 WINDOW 0 -46 27 Left 2 WINDOW 3 62 21 Left 2 SYMATTR InstName M43 SYMATTR Value N_1u SYMATTR Value2 l=1u w=10u SYMBOL nmos4 2512 2096 R0 WINDOW 0 -49 25 Left 2 WINDOW 3 62 21 Left 2 SYMATTR InstName M44 SYMATTR Value N_1u SYMATTR Value2 l=1u w=10u SYMBOL pmos4 3248 1552 M180 WINDOW 0 -16 -8 Left 2 WINDOW 3 36 31 Left 2 SYMATTR InstName M45 SYMATTR Value P_1u SYMATTR Value2 l=1u w=10u SYMBOL pmos4 3536 1552 R180 WINDOW 0 -16 -8 Left 2 WINDOW 3 36 31 Left 2 SYMATTR InstName M46 SYMATTR Value P_1u SYMATTR Value2 l=1u w=10u SYMBOL nmos4 3344 1632 R0 WINDOW 0 -48 27 Left 2 WINDOW 3 62 21 Left 2 SYMATTR InstName M47 SYMATTR Value N_1u SYMATTR Value2 l=1u w=10u SYMBOL nmos4 3344 1808 R0 WINDOW 0 -46 21 Left 2 WINDOW 3 62 21 Left 2 SYMATTR InstName M48 SYMATTR Value N_1u SYMATTR Value2 l=1u w=10u SYMBOL pmos4 2416 2720 M180 WINDOW 0 -16 -8 Left 2 WINDOW 3 36 31 Left 2 SYMATTR InstName M49 SYMATTR Value P_1u SYMATTR Value2 l=1u w=10u SYMBOL pmos4 2704 2720 R180 WINDOW 0 -16 -8 Left 2 WINDOW 3 36 31 Left 2 SYMATTR InstName M50 SYMATTR Value P_1u SYMATTR Value2 l=1u w=10u SYMBOL nmos4 2512 2800 R0 WINDOW 0 -52 28 Left 2 WINDOW 3 62 21 Left 2 SYMATTR InstName M51 SYMATTR Value N_1u SYMATTR Value2 l=1u w=10u SYMBOL nmos4 2512 2976 R0 WINDOW 0 -49 28 Left 2 WINDOW 3 62 21 Left 2 SYMATTR InstName M52 SYMATTR Value N_1u SYMATTR Value2 l=1u w=10u SYMBOL pmos4 1392 -560 R180 WINDOW 0 -16 -8 Left 2 WINDOW 3 36 31 Left 2 SYMATTR InstName M53 SYMATTR Value P_1u SYMATTR Value2 l=1u w=10u SYMBOL pmos4 1104 -560 M180 WINDOW 0 -16 -8 Left 2 WINDOW 3 36 31 Left 2 SYMATTR InstName M54 SYMATTR Value P_1u SYMATTR Value2 l=1u w=10u SYMBOL nmos4 1296 -480 M0 WINDOW 0 -41 27 Left 2 WINDOW 3 62 21 Left 2 SYMATTR InstName M55 SYMATTR Value N_1u SYMATTR Value2 l=1u w=10u SYMBOL nmos4 1296 -304 M0 WINDOW 0 -41 27 Left 2 WINDOW 3 62 21 Left 2 SYMATTR InstName M56 SYMATTR Value N_1u SYMATTR Value2 l=1u w=10u SYMBOL pmos4 928 -560 R180 WINDOW 0 -16 -8 Left 2 WINDOW 3 36 31 Left 2 SYMATTR InstName M57 SYMATTR Value P_1u SYMATTR Value2 l=1u w=10u SYMBOL nmos4 928 -480 M0 WINDOW 0 -11 -11 Left 2 WINDOW 3 62 21 Left 2 SYMATTR InstName M58 SYMATTR Value N_1u SYMATTR Value2 l=1u w=10u TEXT -1064 1664 Left 2 !.tran 0 20m 0 100u startup TEXT -1064 1720 Left 2 !.options plotwinsize=0 numdgt=15 TEXT -1264 448 Left 2 !.MODEL N_1u NMOS LEVEL = 3\n+ TOX = 200E-10 NSUB = 1E17 GAMMA = 0.5 PHI = 0.7 VTO = 0.8 DELTA = 3.0 UO =

Oh, he is a lost cause, but it's a way to have discussions, sometimes on topic.

SED and usenet in general are almost dead.

ltspice digital parts are kinda terrible. If you don't add a prop delay parameter, they can act non-causal.

"john larkin" snipped-for-privacy@htigct.com wrote in message news: snipped-for-privacy@4ax.com...

Thanks. Now the simulation runs but this wasn't intended to be a 50MHz oscillator. What is going on?

Version 4.1 SHEET 1 880 680 WIRE -656 -608 -736 -608 WIRE -656 -576 -704 -576 WIRE -480 -576 -592 -576 WIRE -704 -528 -704 -576 WIRE -480 -528 -480 -576 WIRE -704 -464 -480 -528 WIRE -480 -464 -704 -528 WIRE -704 -416 -704 -464 WIRE -656 -416 -704 -416 WIRE -656 -384 -880 -384 WIRE -480 -384 -480 -464 WIRE -480 -384 -592 -384 WIRE -384 -384 -480 -384 WIRE -384 -352 -432 -352 WIRE -208 -352 -320 -352 WIRE -160 -352 -208 -352 WIRE -112 -352 -160 -352 WIRE -480 -336 -480 -384 WIRE -432 -304 -432 -352 WIRE -208 -304 -208 -352 WIRE -704 -272 -480 -336 WIRE -432 -240 -208 -304 WIRE -208 -240 -432 -304 WIRE -704 -224 -704 -272 WIRE -656 -224 -704 -224 WIRE -880 -208 -880 -384 WIRE -880 -208 -1232 -208 WIRE -656 -208 -880 -208 WIRE -736 -192 -736 -608 WIRE -704 -192 -736 -192 WIRE -656 -192 -704 -192 WIRE -480 -192 -592 -192 WIRE -432 -192 -432 -240 WIRE -384 -192 -432 -192 WIRE -480 -160 -480 -192 WIRE -384 -160 -480 -160 WIRE -208 -160 -208 -240 WIRE -208 -160 -320 -160 WIRE -160 -160 -208 -160 WIRE -112 -160 -160 -160 WIRE -704 -144 -704 -192 WIRE -480 -144 -480 -160 WIRE -1232 -128 -1232 -208 WIRE -704 -80 -480 -144 WIRE -480 -80 -704 -144 WIRE -704 -32 -704 -80 WIRE -656 -32 -704 -32 WIRE -1232 0 -1232 -48 WIRE -656 0 -704 0 WIRE -480 0 -480 -80 WIRE -480 0 -592 0 WIRE -704 80 -704 0 WIRE -112 80 -112 -160 WIRE -112 80 -704 80 FLAG -1232 0 0 FLAG -160 -352 Q FLAG -160 -160 Qbar SYMBOL Digital\\and -624 -656 R0 WINDOW 39 10 -5 Left 2 SYMATTR InstName A8 SYMATTR SpiceLine Td=10n SYMBOL voltage -1232 -144 R0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V1 SYMATTR Value PULSE(0 1 0 1n 1n 1m 2m 100) SYMBOL Digital\\and -624 -464 R0 WINDOW 39 10 -5 Left 2 SYMATTR InstName A1 SYMATTR SpiceLine Td=10n SYMBOL Digital\\and -624 -272 R0 WINDOW 39 10 -5 Left 2 SYMATTR InstName A2 SYMATTR SpiceLine Td=10n SYMBOL Digital\\and -624 -80 R0 WINDOW 39 10 -5 Left 2 SYMATTR InstName A3 SYMATTR SpiceLine Td=10n SYMBOL Digital\\and -352 -432 R0 WINDOW 39 10 -5 Left 2 SYMATTR InstName A4 SYMATTR SpiceLine Td=10n SYMBOL Digital\\and -352 -240 R0 WINDOW 39 10 -5 Left 2 SYMATTR InstName A5 SYMATTR SpiceLine Td=10n TEXT -1264 72 Left 2 !.tran 0 100 0 1n startup

This here seems to work just fine.

Jeroen Belleman ================================= Version 4 SHEET 1 880 680 WIRE -16 -96 -96 -96 WIRE 0 -96 -16 -96 WIRE -16 -80 -16 -96 WIRE 0 -80 -16 -80 WIRE 0 -64 -16 -64 WIRE -16 -48 -16 -64 WIRE 0 -48 -16 -48 WIRE 112 -48 64 -48 WIRE -16 -32 -16 -48 WIRE -16 -32 -32 -32 WIRE 0 -32 -16 -32 WIRE 16 -16 16 -32 WIRE -32 0 -32 -32 WIRE 112 0 112 -48 WIRE -32 32 112 0 WIRE 112 32 -32 0 WIRE -32 48 -32 32 WIRE -16 48 -32 48 WIRE 0 48 -16 48 WIRE -16 64 -16 48 WIRE 0 64 -16 64 WIRE 0 80 -16 80 WIRE -16 96 -16 80 WIRE 0 96 -16 96 WIRE 112 96 112 32 WIRE 112 96 64 96 WIRE 208 96 112 96 WIRE 240 96 208 96 WIRE -192 112 -224 112 WIRE -16 112 -16 96 WIRE -16 112 -192 112 WIRE 0 112 -16 112 WIRE 208 112 208 96 WIRE 240 112 208 112 WIRE 16 128 16 112 WIRE 208 128 208 112 WIRE 240 128 208 128 WIRE 112 144 112 96 WIRE 240 144 208 144 WIRE 352 144 304 144 WIRE 208 160 208 144 WIRE 240 160 208 160 WIRE 256 176 256 160 WIRE -224 192 -224 112 WIRE -224 192 -384 192 WIRE 208 192 208 160 WIRE 352 192 352 144 WIRE -384 208 -384 192 WIRE -32 208 112 144 WIRE 208 224 352 192 WIRE 352 224 208 192 WIRE 208 240 208 224 WIRE 240 240 208 240 WIRE -32 256 -32 208 WIRE -16 256 -32 256 WIRE 0 256 -16 256 WIRE 208 256 208 240 WIRE 240 256 208 256 WIRE -16 272 -16 256 WIRE 0 272 -16 272 WIRE 208 272 208 256 WIRE 240 272 208 272 WIRE -224 288 -224 192 WIRE 0 288 -224 288 WIRE 240 288 208 288 WIRE 352 288 352 224 WIRE 352 288 304 288 WIRE 416 288 352 288 WIRE 464 288 416 288 WIRE 592 288 544 288 WIRE 608 288 592 288 WIRE -384 304 -384 288 WIRE 0 304 -16 304 WIRE 112 304 64 304 WIRE 208 304 208 288 WIRE 208 304 112 304 WIRE 240 304 208 304 WIRE -16 320 -16 304 WIRE -16 320 -32 320 WIRE 0 320 -16 320 WIRE 256 320 256 304 WIRE 16 336 16 320 WIRE -32 352 -32 320 WIRE 112 352 112 304 WIRE -32 384 112 352 WIRE 112 384 -32 352 WIRE -32 400 -32 384 WIRE -16 400 -32 400 WIRE 0 400 -16 400 WIRE -16 416 -16 400 WIRE 0 416 -16 416 WIRE -16 432 -16 416 WIRE 0 432 -16 432 WIRE 0 448 -16 448 WIRE 112 448 112 384 WIRE 112 448 64 448 WIRE -192 464 -224 464 WIRE -16 464 -16 448 WIRE -16 464 -192 464 WIRE 0 464 -16 464 WIRE 16 480 16 464 WIRE -96 528 -96 -96 WIRE 112 528 112 448 WIRE 112 528 -96 528 FLAG 256 176 0 FLAG 256 320 0 FLAG 16 -16 0 FLAG 16 128 0 FLAG 16 336 0 FLAG 16 480 0 FLAG -192 464 D FLAG 416 288 nQ FLAG 592 288 D FLAG -192 112 Ck FLAG -384 304 0 SYMBOL Digital\\and 272 64 R0 SYMATTR InstName A1 SYMBOL Digital\\and 272 208 R0 SYMATTR InstName A2 SYMBOL Digital\\and 32 -128 R0 SYMATTR InstName A3 SYMBOL Digital\\and 32 16 R0 SYMATTR InstName A4 SYMBOL Digital\\and 32 224 R0 SYMATTR InstName A5 SYMBOL Digital\\and 32 368 R0 SYMATTR InstName A6 SYMBOL res 560 272 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R1 SYMATTR Value 1m SYMBOL voltage -384 192 R0 WINDOW 3 -97 171 Left 2 WINDOW 123 0 0 Left 2 WINDOW 39 0 0 Left 2 SYMATTR Value PULSE(0 1 10n 1n 1n 10n 22n) SYMATTR InstName V1 TEXT -488 104 Left 2 !.tran 200n TEXT -256 -144 Left 2 ;D-FF divide by two. Jeroen Belleman - 20260717

"Jeroen Belleman" snipped-for-privacy@nospam.please wrote in message news:113e400$32u9l$ snipped-for-privacy@dont-email.me...

Thanks for that.

It appears that the only difference between the circuit I posted and your circuit is that adding the 1m ohm resistor to my circuit makes it work.

I wouldn't normally leave inputs open circuit but it doesn't seem to be essential to connect them or the ground symbols. (Who makes a five-input gate anyway?)

Why is that resistor needed and how would I know where to add a resistor in other simulations?

Version 4.1 SHEET 1 880 680 WIRE 0 -96 -96 -96 WIRE 112 -48 64 -48 WIRE 0 -32 -32 -32 WIRE -32 0 -32 -32 WIRE 112 0 112 -48 WIRE -32 32 112 0 WIRE 112 32 -32 0 WIRE -32 48 -32 32 WIRE 0 48 -32 48 WIRE 112 96 112 32 WIRE 112 96 64 96 WIRE 240 96 112 96 WIRE -192 112 -224 112 WIRE 0 112 -192 112 WIRE 112 144 112 96 WIRE 352 144 304 144 WIRE 240 160 208 160 WIRE 256 176 256 160 WIRE -224 192 -224 112 WIRE -224 192 -384 192 WIRE 208 192 208 160 WIRE 352 192 352 144 WIRE -384 208 -384 192 WIRE -32 208 112 144 WIRE 208 224 352 192 WIRE 352 224 208 192 WIRE 208 240 208 224 WIRE 240 240 208 240 WIRE -32 256 -32 208 WIRE 0 256 -32 256 WIRE -224 288 -224 192 WIRE 0 288 -224 288 WIRE 352 288 352 224 WIRE 352 288 304 288 WIRE 416 288 352 288 WIRE 464 288 416 288 WIRE 592 288 544 288 WIRE 608 288 592 288 WIRE -384 304 -384 288 WIRE 112 304 64 304 WIRE 240 304 112 304 WIRE 0 320 -32 320 WIRE 256 320 256 304 WIRE -32 352 -32 320 WIRE 112 352 112 304 WIRE -32 384 112 352 WIRE 112 384 -32 352 WIRE -32 400 -32 384 WIRE 0 400 -32 400 WIRE 112 448 112 384 WIRE 112 448 64 448 WIRE -192 464 -224 464 WIRE 0 464 -192 464 WIRE -96 528 -96 -96 WIRE 112 528 112 448 WIRE 112 528 -96 528 FLAG 256 176 0 FLAG 256 320 0 FLAG -192 464 D FLAG 416 288 nQ FLAG 592 288 D FLAG -192 112 Ck FLAG -384 304 0 SYMBOL Digital\\and 272 64 R0 SYMATTR InstName A1 SYMBOL Digital\\and 272 208 R0 SYMATTR InstName A2 SYMBOL Digital\\and 32 -128 R0 SYMATTR InstName A3 SYMBOL Digital\\and 32 16 R0 SYMATTR InstName A4 SYMBOL Digital\\and 32 224 R0 SYMATTR InstName A5 SYMBOL Digital\\and 32 368 R0 SYMATTR InstName A6 SYMBOL res 560 272 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R1 SYMATTR Value 1m SYMBOL voltage -384 192 R0 WINDOW 3 -97 171 Left 2 WINDOW 123 0 0 Left 2 WINDOW 39 0 0 Left 2 SYMATTR Value PULSE(0 1 10n 1n 1n 10n 22n) SYMATTR InstName V1 TEXT -488 104 Left 2 !.tran 200n TEXT -256 -168 Left 2 ;D-FF divide by two. Jeroen Belleman - 20260717 TEXT -32 -144 Left 2 ;Modified by ER

Here's my divide-by-three. There is something fishy though. Note that I'm not actually using the delay line T1, yet, without it, simulation fails. Oh well.

Jeroen Belleman

============================ Version 4 SHEET 1 880 980 WIRE -528 -48 -544 -48 WIRE -464 -48 -528 -48 WIRE -448 -48 -464 -48 WIRE -464 -32 -464 -48 WIRE -448 -32 -464 -32 WIRE -528 -16 -544 -16 WIRE -464 -16 -528 -16 WIRE -448 -16 -464 -16 WIRE -464 0 -464 -16 WIRE -448 0 -464 0 WIRE -304 0 -384 0 WIRE -464 16 -464 0 WIRE -448 16 -464 16 WIRE -432 32 -432 16 WIRE -528 48 -544 48 WIRE -464 48 -528 48 WIRE -448 48 -464 48 WIRE -464 64 -464 48 WIRE -448 64 -464 64 WIRE -304 64 -304 0 WIRE -256 64 -304 64 WIRE -240 64 -256 64 WIRE -528 80 -544 80 WIRE -464 80 -528 80 WIRE -448 80 -464 80 WIRE -256 80 -256 64 WIRE -240 80 -256 80 WIRE -48 80 -176 80 WIRE -16 80 -48 80 WIRE -944 96 -1168 96 WIRE -928 96 -944 96 WIRE -464 96 -464 80 WIRE -448 96 -464 96 WIRE -336 96 -384 96 WIRE -240 96 -336 96 WIRE -944 112 -944 96 WIRE -928 112 -944 112 WIRE -800 112 -864 112 WIRE -784 112 -800 112 WIRE -464 112 -464 96 WIRE -448 112 -464 112 WIRE -240 112 -256 112 WIRE -48 112 -176 112 WIRE -16 112 -48 112 WIRE -944 128 -944 112 WIRE -928 128 -944 128 WIRE -432 128 -432 112 WIRE -256 128 -256 112 WIRE -256 128 -304 128 WIRE -240 128 -256 128 WIRE -944 144 -944 128 WIRE -928 144 -944 144 WIRE -800 144 -864 144 WIRE -784 144 -800 144 WIRE -528 144 -544 144 WIRE -464 144 -528 144 WIRE -448 144 -464 144 WIRE -224 144 -224 128 WIRE -944 160 -944 144 WIRE -928 160 -944 160 WIRE -464 160 -464 144 WIRE -448 160 -464 160 WIRE -912 176 -912 160 WIRE -528 176 -544 176 WIRE -464 176 -528 176 WIRE -448 176 -464 176 WIRE -1168 192 -1168 96 WIRE -464 192 -464 176 WIRE -448 192 -464 192 WIRE -304 192 -304 128 WIRE -304 192 -384 192 WIRE -464 208 -464 192 WIRE -448 208 -464 208 WIRE -432 224 -432 208 WIRE -528 272 -544 272 WIRE -464 272 -528 272 WIRE -448 272 -464 272 WIRE -1168 288 -1168 272 WIRE -464 288 -464 272 WIRE -448 288 -464 288 WIRE -336 288 -336 96 WIRE -256 288 -336 288 WIRE -240 288 -256 288 WIRE -528 304 -544 304 WIRE -464 304 -528 304 WIRE -448 304 -464 304 WIRE -256 304 -256 288 WIRE -240 304 -256 304 WIRE -464 320 -464 304 WIRE -448 320 -464 320 WIRE -256 320 -384 320 WIRE -240 320 -256 320 WIRE -464 336 -464 320 WIRE -448 336 -464 336 WIRE -256 336 -256 320 WIRE -240 336 -256 336 WIRE -32 336 -176 336 WIRE -16 336 -32 336 WIRE -432 352 -432 336 WIRE -240 352 -304 352 WIRE -528 368 -544 368 WIRE -464 368 -528 368 WIRE -448 368 -464 368 WIRE -224 368 -224 352 WIRE -464 384 -464 368 WIRE -448 384 -464 384 WIRE -528 400 -544 400 WIRE -464 400 -528 400 WIRE -448 400 -464 400 WIRE -464 416 -464 400 WIRE -448 416 -464 416 WIRE -304 416 -304 352 WIRE -304 416 -384 416 WIRE -528 432 -544 432 WIRE -448 432 -528 432 WIRE -432 448 -432 432 WIRE -528 480 -544 480 WIRE -464 480 -528 480 WIRE -448 480 -464 480 WIRE -464 496 -464 480 WIRE -448 496 -464 496 WIRE -528 512 -544 512 WIRE -464 512 -528 512 WIRE -448 512 -464 512 WIRE -464 528 -464 512 WIRE -448 528 -464 528 WIRE -304 528 -384 528 WIRE -464 544 -464 528 WIRE -448 544 -464 544 WIRE -432 560 -432 544 WIRE 0 560 0 528 WIRE -528 576 -544 576 WIRE -464 576 -528 576 WIRE -448 576 -464 576 WIRE -464 592 -464 576 WIRE -448 592 -464 592 WIRE -528 608 -544 608 WIRE -464 608 -528 608 WIRE -448 608 -464 608 WIRE -464 624 -464 608 WIRE -448 624 -464 624 WIRE -320 624 -384 624 WIRE -464 640 -464 624 WIRE -448 640 -464 640 WIRE -304 640 -304 528 WIRE -240 640 -304 640 WIRE -432 656 -432 640 WIRE -320 656 -320 624 WIRE -240 656 -320 656 WIRE -528 672 -544 672 WIRE -464 672 -528 672 WIRE -448 672 -464 672 WIRE -240 672 -320 672 WIRE -464 688 -464 672 WIRE -448 688 -464 688 WIRE -240 688 -256 688 WIRE -144 688 -176 688 WIRE -112 688 -144 688 WIRE 0 688 0 640 WIRE 0 688 -16 688 WIRE 80 688 0 688 WIRE -528 704 -544 704 WIRE -464 704 -528 704 WIRE -448 704 -464 704 WIRE -256 704 -256 688 WIRE -256 704 -304 704 WIRE -240 704 -256 704 WIRE -464 720 -464 704 WIRE -448 720 -464 720 WIRE -320 720 -320 672 WIRE -320 720 -384 720 WIRE -224 720 -224 704 WIRE -112 720 -160 720 WIRE 32 720 -16 720 WIRE -464 736 -464 720 WIRE -448 736 -464 736 WIRE -432 752 -432 736 WIRE -528 784 -544 784 WIRE -464 784 -528 784 WIRE -448 784 -464 784 WIRE -464 800 -464 784 WIRE -448 800 -464 800 WIRE -528 816 -544 816 WIRE -464 816 -528 816 WIRE -448 816 -464 816 WIRE -464 832 -464 816 WIRE -448 832 -464 832 WIRE -304 832 -304 704 WIRE -304 832 -384 832 WIRE -464 848 -464 832 WIRE -448 848 -464 848 WIRE -432 864 -432 848 FLAG -48 112 A FLAG -32 336 B FLAG -144 688 C FLAG -48 80 nA FLAG -224 144 0 FLAG -224 368 0 FLAG -224 720 0 FLAG -800 112 Ck FLAG -800 144 nCk FLAG -432 32 0 FLAG -432 128 0 FLAG -1168 288 0 FLAG -912 176 0 FLAG -528 -48 Ck FLAG -528 48 Ck FLAG -528 -16 A FLAG -528 80 B FLAG -432 352 0 FLAG -432 448 0 FLAG -528 304 B FLAG -528 272 nA FLAG -528 368 nCk FLAG -528 400 nA FLAG -528 432 C FLAG -432 560 0 FLAG -432 656 0 FLAG -432 752 0 FLAG -528 480 Ck FLAG -528 704 nA FLAG -528 512 B FLAG -528 576 A FLAG -528 608 B FLAG -528 672 Ck FLAG -432 224 0 FLAG -528 144 A FLAG -528 176 C FLAG -432 864 0 FLAG -528 784 nCk FLAG -528 816 C FLAG -160 720 0 FLAG 32 720 0 FLAG 0 528 0 SYMBOL Digital\\and -416 -80 R0 SYMATTR InstName A4 SYMBOL Digital\\and -416 16 R0 SYMATTR InstName A5 SYMBOL Digital\\and -416 240 R0 SYMATTR InstName A7 SYMBOL Digital\\and -416 336 R0 SYMATTR InstName A8 SYMBOL Digital\\and -416 448 R0 SYMATTR InstName A9 SYMBOL Digital\\and -416 544 R0 SYMATTR InstName A10 SYMBOL Digital\\and -416 640 R0 SYMATTR InstName A11 SYMBOL Digital\\and -208 32 R0 SYMATTR InstName A1 SYMBOL Digital\\and -208 256 R0 SYMATTR InstName A2 SYMBOL Digital\\and -208 608 R0 SYMATTR InstName A3 SYMBOL Digital\\and -896 64 R0 SYMATTR InstName A14 SYMBOL voltage -1168 176 R0 WINDOW 123 0 0 Left 2 WINDOW 39 0 0 Left 2 SYMATTR InstName V1 SYMATTR Value PULSE(0 1 10n 1n 1n 10n 22n 10) SYMBOL Digital\\and -416 112 R0 SYMATTR InstName A6 SYMBOL Digital\\and -416 752 R0 SYMATTR InstName A12 SYMBOL res -16 544 R0 SYMATTR InstName R1 SYMATTR Value 50 SYMBOL tline -64 704 R0 SYMATTR InstName T1 TEXT -1040 32 Left 2 !.tran 200n TEXT 24 112 Left 2 ;Output A is the 1/3 clock output. TEXT -960 -112 Left 2 ;Asynchronous divide-by-three. TEXT -424 904 Left 2 ;No idea why simulation fails if T1 is removed. TEXT -960 -80 Left 2 ;Jeroen Belleman - 20260717 TEXT -424 936 Left 2 ;I'm not actually using it!

Oh, I added that resistor only because you can't give two different names to the same node. D is effectively connected to nQ.

Jeroen Belleman

Ah, I wasn't aware of that. I never simulated logic in LTspice before. Just adding a spiceline 'Trise=1n Tfall=1n' to elements A1, A2 and A3 fixes my divide-by-three. Delay line T1 can be removed and it still simulates correctly.

Thanks for the hint!

Jeroen Belleman

You should really tie unused inputs (and outputs) to gate node 8, that removes them from the simulation.

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nCk FLAG -528 1040 C FLAG -64 720 0 SYMBOL Digital\\and -416 -144 R0 SYMATTR InstName A4 SYMBOL Digital\\and -416 -16 R0 SYMATTR InstName A5 SYMBOL Digital\\and -416 240 R0 SYMATTR InstName A7 SYMBOL Digital\\and -416 384 R0 SYMATTR InstName A8 SYMBOL Digital\\and -416 576 R0 SYMATTR InstName A9 SYMBOL Digital\\and -416 704 R0 SYMATTR InstName A10 SYMBOL Digital\\and -416 832 R0 SYMATTR InstName A11 SYMBOL Digital\\and -208 32 R0 SYMATTR InstName A1 SYMBOL Digital\\and -208 256 R0 SYMATTR InstName A2 SYMBOL Digital\\and -208 800 R0 SYMATTR InstName A3 SYMBOL Digital\\and -896 64 R0 SYMATTR InstName A14 SYMBOL voltage -1168 176 R0 WINDOW 123 0 0 Left 2 WINDOW 39 0 0 Left 2 SYMATTR InstName V1 SYMATTR Value PULSE(0 1 10n 1n 1n 10n 22n 10) SYMBOL Digital\\and -416 112 R0 SYMATTR InstName A6 SYMBOL Digital\\and -416 976 R0 SYMATTR InstName A12 SYMBOL res -80 736 R0 SYMATTR InstName R1 SYMATTR Value 50 TEXT -1040 32 Left 2 !.tran 200n TEXT 24 112 Left 2 ;Output A is the 1/3 clock output. TEXT -960 -112 Left 2 ;Asynchronous divide-by-three. TEXT 360 904 Left 2 ;No idea why simulation fails if T1 is removed. TEXT -960 -80 Left 2 ;Jeroen Belleman - 20260717 TEXT 360 944 Left 2 ;I'm not actually using it!

Ah, I see. That cleans it up quite a bit. Thanks!

Jeroen Belleman

Jeroen Belleman