fast flop NB7V52

Right. Most Pockels Cell divers pull the capacitive load up, from a supply rail, with a mosfet, and later discharge it with another mosfet. Some use four fets in an h-bridge.

But the charge energy is wasted. The ohmic driver dissipates

charging the cap, and the same amount is dissipated in the discharge fet. So that's

C * V^2

lost every shot, for a driver power dissipation of

F*C*V^2.

All for doing no work.

There's a reason that elevators have counterweights.

John Larkin Highland Tech Glen Canyon Design Center Lunatic Fringe Electronics

Am 14.07.26 um 17:18 schrieb john larkin:

We did it with 5 ps resolution between a ground based laser station in Bavaria (Wettzell) and the ISS to measure the photon flight time. I did the SPAD interface, the ps/ns time stretcher and the analog part of syncing the local Pharao Cesium reference and a hydrogen maser for better phase noise.

Yes, the ISS is a moving target and 400 km away when it happens to be just over one's head.

from google ai: PHARAO (Projet d'Horloge Atomique par Refroidissement d'Atomes en Orbite) is the first caesium cold-atom clock to orbit Earth. Launched to the International Space Station (ISS) on April 21, 2025, it is accurate to about 1 part in 10¹⁶ and is expected to drift by no more than one second every 300 million years.Developed by the French space agency CNES, PHARAO is the core of the European Space Agency's ACES (Atomic Clock Ensemble in Space) mission mounted outside the ISS Columbus module. It operates by using lasers to cool caesium atoms to absolute zero (–273°C), bringing them to a near standstill.In the microgravity environment of space, these ultra-cold atoms are in free fall, allowing for the most precise timekeeping ever achieved and enabling scientists to test Albert Einstein’s theory of general relativity with unprecedented accuracy

You might want to read about two way time transfer. <

cheers, Gerhard

could have avoided all the complication if marketing had just said no to the nonsensical request ....

The synchronisation problem has likely been known about since before semiconductors.

Claiming that you can avoid it if you try hard enough is just insane.

Anyone who has ever looked at a computer's motherboard knows that almost any digital system of any complexity has multiple clock domains.

Most people see no reason to care. Some may have read information such as this:

Based on your performance here, you aren't all that well-equipped to ask these kinds of questions or understand the answers you might get. You don't seem to be able to learn either.

The piano action evolved over an appreciable period, and there was prolonged debate between the people who built them and the people who played them.

Marketing is neither. They don't have to be able to use the toys they sell, and they certainly can't design them.

There isn't just one "synchronisation problem"

You don't so much avoid it as reframe it in a way that is easier to solve. It's called system design.

Depending on what you mean by "multiple clock domains".

If you can meet set-up and hold-time specifications, you won't run into metastability problems. I never did. It didn't stop me from being aware of the issue.

Edward Rawde capacity to appreciate my performance here seems limited in much the same way as John Larkin's. He expects to be taken seriously, rarely deserves to be, and resents it whenever he isn't.

The Eward Rawde appreciation society does seem to be pretty small, and not all that active. He does seems to be the only member.

Very early computers were so physically large that they used a transmission line ring main with circulating pulses to keep everything synchronised.

The first Australian computer - CSIRAC - was a purely serial machine and used acoustic pulses running through a long mercury bath as it's main memory

Synchronisation wasn't exactly a major thing. Processing was cyclic, but pretty slow by today's standards.

Many old computers, including some DEC machines, were asynchronous kluges with no main clock anywhere.

The PDP-8I and the first PDP-11 were async horrors.

John Larkin Highland Tech Glen Canyon Design Center Lunatic Fringe Electronics

Nope, this just shows your capacity for making things up.

None existent actually, just like the BS equivalent.

Mercury delay lines weren't "baths". The mercury was contained in a tube with transducers at both ends. Mercury was used because its acoustic impedance was well matched to that of the transducers.

Jeroen Belleman

(Yes, it's 'its'.)

Logic design in the 1960s was a mess, true enough, but aynchronous logic need not be. Every flip-flop is in fact a little asynchronous state machine. Every logic designer should try his hand at designing a clocked flip-flop from elementary gates at least once.

Jeroen Belleman

(Challenge: Design a divide-by-three using just gates.)

Nice.

We provided the master timing system for the NIF laser. There are a couple hundred VME modules scattered around the site, each with eight electrical or optical outputs. They are all programmable to 1 ps resolution with a few ps jitter. Each module receives a fiberoptic master timing signal.

But the clocks on different boards are certainly not phase aligned. The boards are small enough that they have a single 77 MHz clock locally.

An inverter and two SR latches I think.

That's the shoot-from-the-hip approach, which suffers from a race condition. Try again.

Jeroen Belleman

The old DEC machines had one-shots, RCs, and delay lines. They loved delay lines. It was popular to write programs that hung up the CPUs.

I think that a while back Intel tried to do an async CPU.

There is some sort of async logic that has a pass-thru path, "input ready" and "done" or something, so that every logic function can run as fast as it can and pass its output to the next block without wasting time waiting for a clock. Sounds nice in theory.

Of course it's !

Edward Rawde has his own perception of his own performance. It's not all taht realistic.

As I went on to say. People have been known to post reactions to my posts that I have been happy with, but I do try to conceal my glee on the rare occasions that that happens.

There was some kind of long linear structure in the remnants of CSIRAC that looked as if it was the residue of some kind of mercury delay line.

It wouldn't have been an open bath. Everybody was thoroughly conscious of the dangers of mercury vapour by then - I'd read about them in Stock's book on vacuum lines, but it was also inculcated in first year practical science classes. The pulp and paper mill where my father was research manager had it own mercury cell plant for making sodium hydroxide by electrolysing brine, so I'd got it early on.