Emulating Open-Collector operation with TTL 74LS138...

Oct 06, 2022 Last reply: 3 years ago 67 Replies

Which is why we went back to the original 7445 device for this small run (Rotation 8 pinball by Midway) replacement MPU board. The open-collector was needed for allowing the TIP125 to turn off...we are going to make a simple tiny sub-board to sub the 7445 in for the 138 and use a couple of extra gates on the MPU to get the select logic right. The initial run was five PCBs, the next run will have the fix built in of course.

Thanks for all the ideas folks - appreciate your efforts! Reworking

1970s tech can be fun!

John :-#)#

Don't know that I've ever seen "LS TTL" and "ultrafast" in the same connection. ;)

In real life it's never that bad. LS doesn't drive heavy loads (i.e.

50-100 ohms) very fast in the positive direction, and the ~10 ns edges mean that a normal-size board is too small to give that much overshoot--the rise is still going on at the driver when the reflection arrives.

Nah.

Your average NPN BE junction avalanches at about 6V, leading to progressively reduced beta as well as current loading. The duty cycles of the lights on that machine are probably less than 50%, so it'll be in avalanche most of the time.

Cheers

Phil Hobbs

The lights would be on continuously, looks like. Using HC plus cascode FETs would be a complete solution, though.

Cheers

Phil Hobbs

Except this is not what is seen. If the line at the receiver spent any time at 2V, we would see all manner of misbehavior in the circuit. Imagine this being a clock line or an edge sensitive chip enable.

Funny, I've worked on tons of TTL circuits that were not terminated and had no problems with glitchy clocks. Well, maybe not tons, but at least many pounds.

It was always the ECL that required termination. But talk about power dissipation! Whew! We had machines that could overheat a high bay factory just from running the machines! The air conditioners were not designed to run in the winter, so we had to open doors.

It's a single TO-220 PNP.

LS has a darlington with 110 ohms in the drain and probably no ESD diode to +5.

It's shocking how poorly specified all those old TTL parts were. Modern logic isn't much better. We have to measure stuff like Zout and rise/fall times. Sometimes the results are startling.

We just yesterday decided that an efinix FPGA output was a pretty good

50 ohm source termination, so made the traces 50 ohms and deleted some r-packs.

1 inch of trace is a few hundred picoseconds

lørdag den 8. oktober 2022 kl. 19.14.05 UTC+2 skrev John Larkin:

it should be in the IBIS file

LOL, I see why Bill gives you such a hard time. You deserve it. Sure, you can construct any of a dozen scenarios where termination might be needed. Your prior posts didn't talk about those. You blame it all on the inherent structure of the LSTTL output stage. So this one is BUSTED!

It's quicker and funner to measure. More believable too.

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That NC7SV74 rise time was really unexpected. There must be a use for that.

The actual data setup time is not specified.

Yeah, you still need to do the cascode thing. It does solve the maybe-feedthrough-happens concerns Phil was raising.

The 'original circuit' doesn't work. It was a modification of the actual original design (which used a 7445) from the 70s.

The designer forgot that the 48s were open collector and figured a 138 would work fine. It doesn't as the outputs won't go over Vcc (5V) and the TIPs require higher voltage to switch in this circuit. We are going back to the 7445 as a working solution as it is the simplest answer and the number of boards to be made is likely under 100 for the lifetime production. Looked at other solutions and that was the easiest in terms of real estate and cost.

If the board sells more than 50 or so, chances are it will be totally redone and MOSFETs, GALs, etc will be added to bring it more up to date and simplify it further.

John :-#)#

Yes, NPN is needed. oops.

The single part can be soldered acroass a cut track with a short fly-lead from base to a common bus wire connected to VCC, and some cyanoacrylate gel or epoxy to stabilise it mechanically.

Sure thing--driving a sampler, for instance (assuming the jitter is good).

Cheers

Phil Hobbs

Pretty good edge for 13 cents.

Yup. Of course the abs max VDD is 4.6V or thereabouts, so it might be a good time not a long time. That old Fairchild part has probably been fabbed on more than one process in its day, so who knows what the real sitch is anyway.

Something like that, driving a fast part with decent gain (e.g. a pHEMT) is great for one- or two-diode samplers.

Cheers

Phil Hobbs

The rise/fall asymmetry is unfortunate.

I tend to push abs-max limits when there is a big payoff. Parts usually have pretty good margins. Test to destruction, of course, and back off some.

RF parts are usually good for at least 2x the datasheet voltages, because of the way RF people usually design: inductor or tank to specified Vcc and twice that peak sinewave swing in real life.

Spice model? As if!

On 6.10.22 9.24, John Robertson wrote:

If you can handle LTspice, here's a solution.

The original circuit overloads the LS138 with both voltage and current. The abs max voltage on LSTTL pin is 7V and maximum current for LS138 output is 8mA. The circuit gives 20V and 20mA.

There is no information on the lamp load, but the Darlingtons cannot handle more then 5A, which can be reached with 5mA on base.

I made a LTspice model with a guessed 240mA lamp load. The value is not critical.

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Version 4 SHEET 1 2200 680 WIRE 2128 -416 1824 -416 WIRE 2128 -304 2128 -416 WIRE 0 -256 -384 -256 WIRE 176 -256 0 -256 WIRE 464 -256 176 -256 WIRE 592 -256 464 -256 WIRE 912 -256 592 -256 WIRE 1520 -240 1472 -240 WIRE 1648 -240 1600 -240 WIRE 1696 -240 1648 -240 WIRE 1824 -240 1824 -416 WIRE 1824 -240 1776 -240 WIRE 176 -176 176 -256 WIRE 464 -176 464 -256 WIRE 2128 -176 2128 -224 WIRE 1824 -160 1824 -240 WIRE -384 -144 -384 -256 WIRE 912 -128 912 -256 WIRE 1648 -112 1648 -240 WIRE 1760 -112 1648 -112 WIRE 592 -96 592 -256 WIRE 0 -80 0 -256 WIRE 1648 -64 1648 -112 WIRE 464 -48 464 -96 WIRE 464 -48 336 -48 WIRE 336 -16 336 -48 WIRE 1280 -16 1104 -16 WIRE 1472 -16 1472 -240 WIRE 1472 -16 1360 -16 WIRE 1584 -16 1472 -16 WIRE -384 32 -384 -64 WIRE 176 32 176 -96 WIRE 272 32 176 32 WIRE 1104 32 1104 -16 WIRE 464 48 464 -48 WIRE 1648 64 1648 32 WIRE 1824 64 1824 -64 WIRE 1824 64 1648 64 WIRE 912 80 912 -48 WIRE 1040 80 912 80 WIRE 176 96 176 32 WIRE 336 96 336 80 WIRE 400 96 336 96 WIRE -144 144 -384 144 WIRE 0 144 0 0 WIRE 0 144 -80 144 WIRE 112 144 0 144 WIRE 464 160 464 144 WIRE 592 160 592 -32 WIRE 592 160 464 160 WIRE 1104 160 1104 128 WIRE 1104 160 592 160 WIRE 464 192 464 160 WIRE 1824 208 1824 64 WIRE 176 240 176 192 WIRE 400 240 176 240 WIRE 592 256 592 160 WIRE -384 272 -384 144 WIRE 912 272 912 80 WIRE 176 288 176 240 WIRE -384 432 -384 352 WIRE 464 432 464 288 WIRE 592 432 592 320 WIRE 912 432 912 352 WIRE 176 448 176 368 WIRE 1824 448 1824 288 FLAG 176 448 0 FLAG -384 432 0 FLAG -384 32 0 FLAG 464 432 0 FLAG 1824 448 0 FLAG 2128 -176 0 FLAG 592 432 0 FLAG 912 432 0 SYMBOL npn 112 96 R0 SYMATTR InstName Q1 SYMBOL res 160 -192 R0 SYMATTR InstName R1 SYMATTR Value 8k SYMBOL voltage -384 -160 R0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V1 SYMATTR Value 5 SYMBOL voltage -384 256 R0 WINDOW 3 -21 256 Left 2 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR Value PULSE(0 2.5 0 100n 100n 500u 1m) SYMATTR InstName V2 SYMBOL res 160 272 R0 SYMATTR InstName R3 SYMATTR Value 3k SYMBOL npn 400 192 R0 SYMATTR InstName Q2 SYMBOL npn 400 48 R0 SYMATTR InstName Q3 SYMBOL res 448 -192 R0 SYMATTR InstName R4 SYMATTR Value 120 SYMBOL npn 272 -16 R0 SYMATTR InstName Q4 SYMBOL res -16 -96 R0 SYMATTR InstName R5 SYMATTR Value 20k SYMBOL schottky -80 128 R90 WINDOW 0 0 32 VBottom 2 WINDOW 3 32 32 VTop 2 SYMATTR InstName D1 SYMBOL pnp 1584 32 M180 SYMATTR InstName Q5 SYMATTR Value 2N3906 SYMBOL pnp 1760 -64 M180 SYMATTR InstName Q6 SYMATTR Value 2N2907 SYMBOL res 1616 -256 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R2 SYMATTR Value 8k SYMBOL res 1792 -224 M270 WINDOW 0 32 56 VTop 2 WINDOW 3 0 56 VBottom 2 SYMATTR InstName R6 SYMATTR Value 120 SYMBOL res 1376 -32 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R8 SYMATTR Value 4.7k SYMBOL res 1808 192 R0 SYMATTR InstName R9 SYMATTR Value 80 SYMBOL voltage 2128 -320 R0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V3 SYMATTR Value 20 SYMBOL npn 1040 32 R0 SYMATTR InstName Q7 SYMATTR Value 2N3904 SYMBOL res 896 -144 R0 SYMATTR InstName R10 SYMATTR Value 2k SYMBOL schottky 608 320 R180 WINDOW 0 24 64 Left 2 WINDOW 3 24 0 Left 2 SYMATTR InstName D2 SYMBOL schottky 608 -32 R180 WINDOW 0 24 64 Left 2 WINDOW 3 24 0 Left 2 SYMATTR InstName D3 SYMBOL res 896 256 R0 SYMATTR InstName R7 SYMATTR Value 2k TEXT 1320 448 Left 2 !.tran 5m TEXT 1488 80 Left 2 ;TIP125 model TEXT 1400 136 Left 2 ;Lamp driver with resistor changes TEXT 1640 328 Left 2 ;240 mA lamp TEXT 992 456 Left 2 ;Voltage translator TEXT -56 440 Left 2 ;LSTTL model TEXT 1840 -288 Left 2 ;E TEXT 1840 96 Left 2 ;C TEXT 1432 -32 Left 2 ;B RECTANGLE Normal 704 496 -208 -304 2 RECTANGLE Normal 1424 112 1952 -304 2 RECTANGLE Normal 1264 -336 1984 160 2 RECTANGLE Normal 1216 -304 816 496 2 CIRCLE Normal 1904 320 1760 192 2

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This should work - at least in simulation.

Rather than making us fire up LTspice, what is your approach based on? Are you adding a transistor, or just passives? Or something entirely different?

Changing the base resistors so that the current drive capability is not exceeded and adding a common-base npn transistor to take care of the voltage.

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