Re: IC pin characteristics

I am sure there are many resources (at manufacturers websites for starters). This is more a topic for s.e.b. which I've cross posted to for comments.

Fully driven. I would assume this is an output that always drives high or low.

Tristate (a registered trademark of National Semiconductor, incidentally). Also known as three-state for the good reason this is an output with three states: High, low or high impedance (open circuit), also known as Hi-Z. We say an output is tristated when in the high impedance mode. This allows us to put more than one output on the same wire (rather useful for busses), although the same could be accomplished at a slower speed with open collector/open drain devices with a common pullup. (Could also be open emitter with a pulldown - see ECL).

Pullup / pulldown. When applied to internal circuitry, this means there is a pullup ( or pulldown) device inside the chip (which may be a resistor but is more commonly a FET) which, in the absence of an input (floating input) will pull the input to the appropriate level. A pullup pulls high, a pulldown pulls low.

There are other classifications, such as levels (TTL/LVTTL/CMOS/GTL and a host of others), drive capability and more.

Cheers

PeteS

Hey,

I've recently been introduced to IC pin types (fully driven, tristate,pull up/down etc) with regard to the MC68008 CPU. I find it quite confusing but haven't been able to find any good resources on the web or in my library about the distinction between the different types. Does anyone know where I could find such a resource?

Thanks for these helpful explanations! Is there a good reason for why there would be pull-up resistors on the OUTPUT of a gate?

I just built this microcontroller programmer,

and I couldn't find a 74LS05 so I used a 74LS04 without the pull-up resistors. It works just fine nonetheless. I don't understand why open-collector gates with pull-ups were specified in the schematic... but I am a noob :-)

Dan Lenski

Although there are times (to provide a passive pullup on wire-OR/NOR), it is a little unusual to find them *inside a chip* in that mode. Ultimately, a pullup (or pulldown for that matter) is there to provide a passive DC level at some input somewhere/

During verification, the PIC drives the data line. This is a classic case of needing a passive pull. As either side can drive the line, we pull it with a resistor. If one side is active, then consider what happens if the active side drives high and the other side drives low.

Cheers

PeteS

If the output is open-collector - yes. Connecting several in parallel provides a wired NOR function.

Graham

I was referring to the IO port structure, where pullups, although common are often disabled when the port pin is an output. I was aware of the extensive use of pullup/down within VLSI :)

I'm not sure if I can even buy a 'real' totem pole output device any more ;)

74xCx will drive to the rail for low currents, of course.

Cheers

PeteS

It's not unusual at all. Wired ANDs/ORs are quite common in VLSI design. Often the pullup is dynamic (precharge) and the resolution function is a series of wired logic. Address decoders are a classic use of wired logic.

The other possible issue here is that the pins might want to be driven closer to the rail. An O.C. driver will have a 5V (rail) high, where a totem-pole driver will be about two diodes below that. Though with a totem-pole driver the resistor can still be added to bring the output higher.

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  Keith

many gates don't produce much curren out of their outputs when high, abut when their output is low it's fairly well connected to ground.

I'm not sure either... I'd have expected series resistors on rb6 and rb7 to handle the case when the pic wants to drive those pins as outputs while connected top the circuit... maybe this never happens..

Bye. Jasen

Even open-drain outputs aren't all that uncommon. Xilinx has them in their I/O menu.

The issue here was 74ls04 vs. 74ls05 though. Certainly CMOS will drive right to the rails. ;-)

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  Keith

so

I think my point was that pullups are not usually 'visible' when a port (especially a configurable port such as a Xilinx IO) is an output, especially when it's open drain :)

Cheers

PeteS