I still think you can make the capacitor idea work. It would need a cap and a pullup resistor for each output. Or you could use a Schottky diode to +5V instead of the resistor. That would make the recovery time shorter after a pulse and protect the 138 output.
I was thinking of a package like the TO220 that is currently in the design, but with an extra pin. I've seen packages like that, some with five pins. I'm pretty sure only four pins are needed, in, out, power, ground.
The UDN2981 package might be too limiting for the power dissipation.
Um... the 138 going active low, you want that emitter to be of an NPN transistor, not PNP. For example, ROHM DTC124XE3 HZG Although, with eight outputs to handle, a dual package might be good, too.
You can probably omit the R1 E-B resistor, 1k is rather low and all the TIP125 I saw had on-chip E-B resistors to soak up and leakage currents.
The base drive resistor R2 is also very low value, 1k at 20V is 20mA which while within 7445 spec is way above the 8mA Iol of 74LS parts. The darlington has minimum current gain of 1000 so I am sure you can use very much lower base drive.
If you get base drive to a couple hundred uA then a series 0.47uF cap could solve the level shift problem. Otherwise you could try lifting the base end of R2 and wiring an NPN in series - so collector of NPN drives darlington base and emitter of NPN goes via R2 to the TTL output. The buss all the bases together to the TTL 5Vcc. 4mA drive should be enough for up to 4A of lamp loads. The resistor R2 in series with the TTL output will also cushion the TTL output against the stored charge spikes Phil Hobbs pointed out.
I can see that the original circuit might work fine, but it does depend on parameters that are not specified in the data sheet like the breakdown voltage of the output pull-down transistor, so I wouldn't be comfortable calling it "well designed".
I think you mean the lack of absolute maximum ratings for the outputs, as I'm sure they never expected anyone to think it would be safe to treat a totem pole output to be treated as an open collector.
I thought I was following this ok, until I got to the point of the second wave being clamped at the LS input to the 5V rail. Is that were the case, how could the first reflection be above 5V?
That aside, your whole description is pretty off track. The LS output driving the "high impedance" trace, does not pull up to 5V in the first place. The "high impedance" trace is not high enough to be ignored. The reality is the driver output will only drive hard to maybe 3.5V. Combine that with the trace impedance loading of around 110 ohms, and you get something like a 2V initial edge on the trace. This will be doubled at the far end reflection at the LS input, to about 4V. So there's no need to worry about over voltage from reflections.
It's been too many years since I've looked at waveforms of LSTTL signals on a scope. When I was looking at TTL signals, people didn't understand impedance matching very widely. But things worked pretty well without terminations. It was later that higher clock rates were attempted and people finally figured out that the signals were not reaching the other end of the trace perfectly when there was more than one receiver. Also, CMOS.
It has been many years for me too. I spent several months in 1974 building prototype digital television equipment using 74S devices. I don't recall ever seeing overshoots of more than about 6V. I had access to excellent test equipment. However, this was all hand-wired on perforated Veroboard and any signals going more than a couple of cm were wired as twisted pair. Every chip usually had its own decoupling capacitor, chosen for low Q so as to absorb switching transients.
ElectronDepot website is not affiliated with any of the manufacturers or service providers discussed here.
All logos and trade names are the property of their respective owners.