Some time ago I found Intel video that shows the benefit of ECC memory. The video presents modified ECC memory module with a switch that induces memory error, then it shows how i5 can't handle such error and how Xeon processor can. Here is the video in question, they show module at time 28-29s: I'd like to have such module for demonstrating purposes. I wrote on Intel forum but after some time it occured that it is impossible to get the schematic of the modification from them (obviously...). Is it possible to figure out how to make such modification? Theoretically, what modification would probably work and would not damage motherboard/CPU? I would appreciate your thoughts. thanks geos

Error detection and correction coding involves adding check bits to individual words of data. The scheme I was supposed to implement on one system that never actually got built would have need seven extra bits to check and correct 32 bit words, and eight to check and correct 64 bit words. That means that your "64-bit" memory words have to be stored in 72-bit wide words, and routed through a 72-bit wide error checking and correction module on the way to the 64-bit wide processor. The error-checking and correction process takes a finite time, which changes the clock timings around the system. It wouldn't be easy to retrofit. -- Bill Sloman, Sydney

ECC memory module modification?

Sep 23, 2018 64 Replies

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krw 7 years ago

Wrong, of course.

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krw 7 years ago

One more bit is needed for each power-of-two increase in word width. Note that the probability of multi-bit (undetectable/correctable) errors goes up as well.

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Clifford Heath 7 years ago

I pointed to the Wikipedia page, which has a table of the most common bit widths and their detect/correct power. No-one seemed to notice that either.

Clifford Heath.

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Tom Del Rosso 7 years ago

I did, and I should have thanked you for that, but what I didn't understand was why the scheme I described didn't work.

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gnuarm.deletethisbit 7 years ago

Wrong, of course.

The ECC bits have to be included in the parity which subtracts from the power of two, along with the total number of bits covered being 2^n - 1.

Rick C.

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