Digital sine wave generation

While my obsession is still digital sine wave generation, I'd like to note that the resistor values in AOE 2nd Ed, 9.38, for the twisted-ring counter weighting resistors are not the best values to choose in the E96 series. They're not bad but not the best.

If someone wants to check, I think Lancaster's _CMOS Cookbook_ has the same resistor values as AOE. Can't find my copy of Lancaster's book at this moment.

What is in AOE is:

Q1: 57.6K Q2: 30.9K Q3: 23.7K Q4: 22.1K Q5: 23.7K Q6: 30.9K Q7: 57.6K

My search has shown that you get 80% less sum-of-squares error if you instead use these standard E96 values:

Q1: 30.1K Q2: 16.2K Q3: 12.4K Q4: 11.5K Q5: 12.4K Q6: 16.2K Q7: 30.1K

The matching with these values makes it worthwhile to use 0.1% or even better resistors (which are actually affordable and available these days!)

It appears to me that a generic 74HC595 output has an output impedance of 40 or 50 ohms at room temperature and currents under 1mA and 5V Vcc, and at these impedances it is actually very slightly better to use the

11.5K-12.4K-16.2K-30.1K range rather than the ten-times-higher 115K-124K-162K-301K.

Tim.

Reply to
Tim Shoppa
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I think that you are about to find about Gibbs oscillations. If your values are sine x/x (sinc) you are going to find that you want to applying a Hamming raised cosine window (which it looks as if Win and Don have done) to eliminate the ringing in the frequency response that you get by truncating the shift register (Gibbs oscillations).

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Bill Sloman, Nijmegen
Reply to
bill.sloman

I don't think that's what I'm writing about Bill. The synthesizer in question uses those 7 resistors (4 different values, really very clever) to synthesize a 16-step approximation to a sin wave. The values synthesized are "just" sin(pi/16),sin(3*pi/16), etc. The shift register runs at exactly 16 times the resulting sine wave frequency.

sinc(x) comes in when you're windowing and the sampling rate is not a simple harmonic of the signal, right? Interesting stuff but not relevant to my much simpler application.

Tim.

Reply to
Tim Shoppa

You are running a square wave through a shift register, and using the resistors to set up the coefficients for an FIR low pass filter. That's exactly what I was doing (in another context) and I spent a long time recalculating all the resistors and soldering in the new set. Beleive me (and Win Hill and Don Lancaster), it is relevant to your application.

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Bill Sloman, Nijmegen
Reply to
bill.sloman

OK, Bill, this is what I'm saying: to synthesize a sine wave with 16 steps, choose the values so that what comes out is sin(phase) for 16 equally spaced phases from 0 to 2pi. This is exactly the way the resistors were chosen in AOE. I'm only saying that I chose some E96 resistors that implement this a factor of five better (in terms of mean-square error) than the set in AOE. The ratios are all the same to within a percent, it's just that my proposed set is better at achieving the ideal voltage ratios.

Tell me how this is different than what's in AOE 9.38? Or the approach of any other DDS sine wave synthesizer?

And then tell me how what you do is better. Are your first 14 harmonics zero? Or are you spreading out the badness so that some harmonics below the 14th are nonzero, but such that your synth plus low-pass filter combo is more effective at reducing THD in the end because your higher harmonics have been chosen to be lower?

Tim.

Reply to
Tim Shoppa

Good question. Since I was filtering psuedo-random noise back in 1977, it is going to be difficult to answer this question. From what I can recall, the truncated sinc sequence gave a sharper low frequency cut-off (with some ringing) followed by a rather poor and oscillating cut-off at higher freqencies, while the raised-cosine windowed sequence did not cut off as sharply at low frequencies, but gave a pretty much monotonically increasing cut-off with increasing frequency.

If you only want to synthesise a narrow range of sine wave frequencies, the amplitude of the high frequency harmonics isn't too important - you can always filter them out with a low pass filter. IIRR, my circuit did relay on a Sallen and Keys two-pole to get rid of the last of the high freqncy junk, with switchable capacitors to handle decade changes in frequency range, but I had to change the resistor values to get the customer happy.

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Bill Sloman, Nijmegen
Reply to
bill.sloman

Bill -

I've come to the conclusion that you are solving a different problem (bandpass of a noisy signal) than the one I'm obsessed with (synthesizing a sine wave where the clock is an exact multiple of the output frequency).

Nothing against what you did, I'm sure it was interesting, and it is related in an abstract way to what I'm doing (your parallel with FIR filters has some relevance in a sort-of upside down way, because I'm starting out with a digital clock that has no noise beyond jitter in the 10-20 ns range).

But what I'm doing is hoplelessly more simplistic. JUST choosing optimal E96 resistor values to give good approximations for sin(phase) for equally spaced steps.

Tim.

Reply to
Tim Shoppa

I understand, and sounds interesting. How do you connect the 7 resistors to distinguish 16 different phase instants? What is AOE?

Best,

Reply to
Mochuelo

A book that is mentioned quite often in this newsgroup.

-- Service to my country? Been there, Done that, and I've got my DD214 to prove it. Member of DAV #85.

Michael A. Terrell Central Florida

Reply to
Michael A. Terrell

Could you post a schematic showing how the resistors are connected to the digital IC over on ABSE?

Reply to
The Phantom

The Art of Electronics by Horowitz and (Win) Hill. ISBN: 0521370957. It is on special at Amazon at the momnent fpr $70 new, and from $45 used - there are five used copies on offer, and a bunch of sellers offering new copies from $62.

Originally written as a tesxtbook for training physicists at Harvard in electronics, so aimed at the brigher student. Cambridge University in the U.K. used it as an undergraduate test for their electronic engineers.

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Bill Sloman, Nijmegen
Reply to
bill.sloman

Right, but what you are doing is producing a staircase apprixiation to a sine wave.

If you take the staircase that you are going to synthesise, and do a Fourier analysis on it, you will find - as you intend - a large component at 1/16th of your clock frequency, very small components at the first few harmonics of that frequency - due to the tolerances on your resistors, and the limitations of working within the E96 grid, followed by quite large harmonics at the clock frequency and its harmonics.

You cna understand this intuitively by subtracting your desired sine wave from your staircase approximation, which leaves you with a series of sawteeth, whose amplitude is at a maximum around 0 and 180 degrees, and whose polarity reverses from 0 to 180 degrees.

At present you are tinker with the staircase to minimise the harmonics below the clock frequency. You can equally tinker to minimise the harmonics above the clock frequency.

If your clock frequency is stable and never gets changed, then a fancy multipole filter is the better way of getting rid of the higner harmonics,

Even better is to use an integrator to synthesise the sine wave as series of straight lines of variable slope - though the amplitude then depends on the value of your integrating capacitor, and you might need a precision rectifier and feedback loop to get an absolutely stable amplitude over temperature.

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Bill Sloman, Nijmegen
Reply to
bill.sloman

In article , Mochuelo wrote: [...]

I'm not sure what he did but here's how I did it for less states:

You make a "shift register" that does this:

State Bits 0 0 0 0

Obviously, there is at least one bit hidden inside this part. In this circuit, you only need 3 resistors to get 8 points on the curve.

If you want to use a switched capacitor filter to smoothen it out, a tap a few more up the chain will give the clock for it. The nice thing about that is that when you slew the clock speed, the internal time constants move with it and the node voltages are uneffected. The result is that it doesn't generate the low frequencies.

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kensmith@rahul.net   forging knowledge
Reply to
Ken Smith

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Many thanks,

Don Lancaster                          voice phone: (928)428-4073
Synergetics   3860 West First Street   Box 809 Thatcher, AZ 85552
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Reply to
Don Lancaster

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Reply to
bogax

Jeezus-Dammit that's ugly!

Is it supposed to look like a power point slide show?

(you usually do better)

Reply to
bogax

Ok, I know which circuit you mean. When you talk about sum-of-squares error, you mean between the staircase and the sinusoid? If that's the case, that is not a good criterium. You should look at the spectrum of the staircase signal. If you have Matlab (or equivalent), you can compute the fft of your signal and see which resistor values give you the lowest THD, for instance. You can easily include the effect of the resistor tolerances to see if the circuit will be viable or not. The effect of the output impedance of the shift register stages is more difficult to be taken into account because the resistance is not constant. I would clock manually the circuit, measure the output voltage with a good DMM, solve a system of equations, and find the set of resistor values that more or less "calibrate" the circuit.

But I don't like very much this structure. Using pairs of resistors that should have matching values (but in fact will never have) is not the most "compact" way of doing this.

Best,

Reply to
Mochuelo

What voltage levels did you determine give the best approximation to the sine wave?

Reply to
The Phantom

I analyzed the problem with some assumptions. I assumed the counter was some kind of logic like CMOS that can swing the outputs rail to ground with zero output impedance (I didn't consider the 40 or 50 ohms you mention below). To do the mathematical analysis I assumed the rail voltage was 2 volts, so that the output sine wave's most negative voltage was zero, and the most positive voltage was 2 volts. In other words, a standard mathematical sine wave with a 1 volt offset. I assumed 16 steps. I computed the sum-of-squares error with only half of the sine wave (Sin[t]+1), namely, that portion from t=-pi/2 to t=pi/2. The sum-of-squares error was computed by integrating from the left edge of each step to the right edge and doing this for all 8 steps of the half sine wave, then adding the 8 results. The integrand was (Sin[t]+1-Vn)^2, where Vn was the output voltage of the circuit for the steps starting at t=-pi/2, n=1 to 8.

For this set of resistors, I got a sum-of-squares error of .0211462.

For this set of resistors, I got a sum-of-squares error of .0211649, slightly larger than the previous set.

I found that the minimum sum-of-squares error that this circuit with the

7 resistors can give is .0205938. If I use the following standard value resistors, the error is .0205970:

Q1: 57.6K Q2: 36.5K Q3: 28.0K Q4: 26.1K Q5: 28.0K Q6: 36.5K Q7: 57.6K

I also found that if one selects for the desired output voltages the value of (Sin[t]+1) at the time midpoints of the steps, the sum-of-squares error is .0206273.

There is a subtlety that leads to a small error when comparing all these values. Each stepped approximation should be normalized by dividing by the magnitude of the fundamental component in the given stepped approximation before computing the sum-of-squares error, but I didn't do this (yet; I may later, but the error isn't large).

With this much number crunching involved it's easy to make a mistake, but these are the results I got with a reasonable amount of care.

Once you pass this stepped sine wave through almost any kind of low-pass filter I suspect the result from these various cases will be indistinguishable in terms of waveshape purity.

Reply to
The Phantom

As far as I know, minimizing sum-of-squares gives the same result as minimizing THD.

Reply to
The Phantom

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