deglitching a clock

Mar 27, 2006 72 Replies

Yup, that's about ideal.

Skew doesn't matter here, and daisy chaining is fine *if* everything is done right, which it wasn't in this case. ECL clocks are usually daisy-chained... many small chips and picosecond skew requirements between nearby chips. Star fanout to 50 or so loads gets messy.

We're leaning towards slowing down the edge at the xo, maybe with an R-C or an HC-class buffer, and adding a tiny-logic schmitt buffer at each fpga, giving most of a volt of noise immunity. There's no room for star traces, or at least not without a lot of ripups. If we put the tinies on the bottom, under the fpga's, they fit nicely and we don't have to waste a bunch of hundreds of bucks on a new solder-paste stencil and reprogramming the pick-and-place.

Hey, the CPU has a clock-out pin, same freq as the clock-in in this case. We could use *that* to drive the two following FPGAs in the string. It's a 68332, ancient process cmos, swings hard and makes nice sedate edges! May as well leave the deglitcher in there, so we don't have to re-release the designs.

John

One of my customers screwed up the pinout on a largish microprocessor chip, *every pin*, and kluged it to work. It looked like a chip sitting on a ball of red yarn.

John

Hello John,

That increases phase noise. It may not matter in the digital world but I wouldn't do that for ADC clocks.

One technique I use if a home-run star system isn't practical is a nicely impedance controlled clock line (or a few) and then tapping off with low-C RF transistors wherever the clock is needed. It raises the hackles of the digital folks during design reviews but after a thorough explanation they like it.

That's how TV distribution used to be done in Europe, one line down from the roof and tapped off with -20dB couplers. At the very end there is a terminator. I use AC termination, mostly.

Regards, Joerg

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I've had that happen, too! I laughed out loud reading your post. It is good to know that others in the world have gone through the same pain :) !

Take care, Rob

CATV systems still use backmatched taps, but the tap value drops the further you get from the amp. the systems I worked with were designed for a +10 dBm signal at the port on the tap to allow for four TVs per drop, and up to 4 dB loss in the drop and house wiring. It was an average sized system with 10,000 active drops, and 4,000 homes passed that didn't have service.

Service to my country? Been there, Done that, and I\'ve got my DD214 to prove it. Member of DAV #85. Michael A. Terrell Central Florida

The MC68340 is the same family as the MC68332. I saw a lot of MC68340 on the embedded controllers we built for the Microdyne 700 &

1620 series of telemetry equipment, as well as a satellite tracking controller that used a modified version of the same custom controller. They made a layout error for the 32,768 Hz oscillator that no one had noticed. It caused starting problems, and there was no way to fix it without changing the board layout.
Service to my country? Been there, Done that, and I\'ve got my DD214 to prove it. Member of DAV #85. Michael A. Terrell Central Florida

The 32 KHz oscillator/PLL thing is really a pain on the Moto parts. It's a lot easier and much more reliable to just buy a packaged XX MHz oscillator and use it directly.

John

I agree, but the design team insisted that they needed the ability to reprogram the CPU's clock rate, "Just in case." Then to add insult to injury, they mounted the watch type tuning fork crystal vertically, and soldered the bottom edge of the crystal's case to a large pad rather than lay it down and use a drop of RTV to shock mount it. I saw a lot of dead boards with dead crystals. There were so many that I kept 10 spare crystals on my bench. They mounted the less sensitive baud rate crystal the right way, and soldered the top of the can to a pad. All of this was done a year before I was hired so I was stuck with getting the things out of production, and into customer's hands.

Service to my country? Been there, Done that, and I\'ve got my DD214 to prove it. Member of DAV #85. Michael A. Terrell Central Florida

Hello John,

Yes, generally. But you need a negative supply and ideally a +8V or higher as well (really, really good bypasses or it'll oscillate). This is usually the case for the systems I work on but the analog folks are often suspicious about me tapping into "their" supplies for lowly digital purposes. Once I tell them that I am an analog guy myself that relieves them from their worries. Now, about that big honking stepper motor...

Regards, Joerg

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We once soldered tiny wires to the vias on the *top* of a BGA package to get at some signals we'd thought we wouldn't need to get to on the prototype... that was fun :-)

martin.j.thompson@trw.com TRW Conekt - Consultancy in Engineering, Knowledge and Technology http://www.trw.com/conekt

Try XAPP609 and Answer Record 17697 for a description of local clock placement and routing restrictions (although I think XAPP609 only describes V2, the structure is similar but not identical in S3).

Brian

Thanks! I'll give it a thourough reading.

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