Hi,
I was thinking about how to make a mosfet have low on state resistance and also have low gate capacitance while not taking up too much space:
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I think this design should:
- minimize gate capacitance by making a longer gate (parallel capacitance)
- minimize the on-state resistance by making a wider current path (parallel resistance)
- keep the area used to a minimum
Any idea if this would be any good?
cheers, Jamie