Hi everyone,
I am trying to interface USBee=91s Experimenter board,
The CPLD writes this data into the Dual Port RAM,
This RAM has 19 bit of address bus and 18 bit data bus. So, it has
512 k word of memory locations and each memory location is 18 bit wide. Am I right? So, it has 524 k x 18 =3D 9.4 M bits, Am I right?I only need 14 bit of data. So, I guess 524 k x 14 =3D 7.3 M bits. Am I right? So, CPLD writes first eight bit of data to the RAM on the first falling edge of the CLOCK and then the 5 bit of data on the second falling edge of the CLOCK.
I need to calculate in how much time CPLD writes the full RAM with data.
So, I guess it takes
41.6nsec to write a byte and 83.2 nsec to write two bytes or write one RAM location. 43.5 msec to write 524 k RAM locations.Am I right about this?