Broadband impedance matching of series RL load

On Tue, 13 Mar 2018 23:39:57 -0700 (PDT), snipped-for-privacy@gmail.com wrote:



That's hard to think about. Got a schematic?

What is the ultimate goal?

On Wednesday, March 14, 2018 at 10:19:16 AM UTC-4, John Larkin wrote:

.
He could add the 'right' parallel R+C to make it look purely resistive.  
That does nothing for the load but keeps the amp happy.  
(RC = L/R)  

George H.  

On Wed, 14 Mar 2018 08:37:47 -0700 (PDT), George Herold



Amp?  

"The source is a pure resistor."

On Wednesday, March 14, 2018 at 11:56:25 AM UTC-4, John Larkin wrote:

Right, my mistake.  He could post the spice file.  

George H.  

On Wed, 14 Mar 2018 09:15:19 -0700 (PDT), George Herold



Yes. The problem is not well defined.

start simple,  

use a series capacitor to tune out the reactance of the inductor at a single frequency.  

m

On Wednesday, March 14, 2018 at 1:54:16 PM UTC-4, snipped-for-privacy@yahoo.com wrote:


also this re antennas
https://en.wikipedia.org/wiki/Chu%E2%80%93Harrington_limit

On Wed, 14 Mar 2018 10:54:10 -0700 (PDT), snipped-for-privacy@yahoo.com wrote:



One thing that was clearly defined is "broadband."

On Tue, 13 Mar 2018 23:39:57 -0700 (PDT), snipped-for-privacy@gmail.com wrote:



Schematic?  What does "wideband" mean?  fL, fH, dB's?
        
                                        ...Jim Thompson

On Thursday, March 15, 2018 at 5:15:38 AM UTC+5:30, Jim Thompson wrote:


The SPICE netlist is listed below:  
Low pass filter impedance matching
* Identical load source resistance
* and series load inductor

.PARAMS FREQ=3.453144e+08 LLIM=1.726572e+07 HLIM=6.043003e+08 AMPL10%

.SUBCKT LPFILT 1 2
* 1 IN
* 2 OUT
C1 1 0 2.353875e-10
L2 1 3 6.431530e-10
C3 3 0 8.787569e-10
L4 3 4 8.791318e-10
C5 4 0 6.441774e-10
L6 4 2 2.367870e-10
.ENDS

* COMMENT OUT TRANSIENT ANALYSIS
* TO RUN AC ANALYSIS AND VICE-VERSA

LLOAD 6 7 1.200000e-08
LCOMP 5 6 1.772026e-11
RSRC 1 2 50.000000
RLOAD 7 0 50.000000
XLP 3 4 LPFILT
VTST0 2 3 DC 0.0 AC 0.0
VTST1 4 5 DC 0.0 AC 0.0

* FOR TRANSIENT ANALYSIS
VSIG 1 0 DC 0.005 SIN(0 0 0 0)
* FOR AC(SMALL SIGNAL) ANALYSIS
VSIG 1 0 DC 0.005 AC )

.OPTIONS METHOD=GEAR NOPAGE RELTOL=1m MINBREAK=5ps
.IC
.TRAN 75.0ns 500.0us 50.0ns UIC
* INPUT/SOURCE SIDE
.PRINT TRAN V(3) I(VTST0)
* LOAD/OUTPUT SIDE
.PRINT TRAN V(4) I(VTST1)

.AC LIN 20000
.PRINT AC V(5)
** FOR REFLECTION COEFFICIENT ETC.,
.PRINT AC V(2)
.END

Any hints/suggestions would be very helpful.
Thanks in advance.

On Thu, 15 Mar 2018 05:30:38 -0700 (PDT), snipped-for-privacy@gmail.com wrote:



Can you post a visible schematic?

I still don't know what you are trying to do.

I've done some work lately on one-end-reflectionless lowpass filters,
based on Jeroen's concepts. Mini-Circuits has some interesting new
symmetric filters, both-ends-reflectionless.

There's that, and there's one-end-terminated filters.  Handy when you don't  
want the extra loss of a source terminator, instead just wire it up to the  
device output (usually a CCS || C, open collector/drain output).  Use a  
shunt-capacitor topology, pin capacitance contributes to the first cap in  
the filter (or becomes it, in which case you obtain maximum gain-bandwidth  
from that stage).

Or vice versa, like peaking coils for CRT deflection plates (old fashioned,  
I know).

Tim

On Thu, 15 Mar 2018 14:22:43 -0500, "Tim Williams"



https://www.dropbox.com/s/evoq6p2nvzyl6wo/547_crt.JPG?raw=1

On Thursday, March 15, 2018 at 9:27:10 PM UTC+5:30, John Larkin wrote:


I am afraid I do not have a visible schematic. I use HSpice at work, and Ngspice at home, both of which use the text input. It is sometimes bothersome to enter a new large netlist, but  
editing is very easy.  

On Fri, 16 Mar 2018 04:12:22 -0700 (PDT), snipped-for-privacy@gmail.com wrote:



Just a sketch would help. I don't know what you are trying to do.

LT Spice lets you draw a schematic instantly. Typing (and reading!)
netlists is really old-fashioned.

On Friday, March 16, 2018 at 8:27:40 PM UTC+5:30, John Larkin wrote:


The setup is simple :  
A signal source feeds a low pass ladder matching network, e.g., of order 6. The source impedance is purely resistive (NO source reactance). The load is a resistor in series with an inductor. The load and source resistors have the same value
So how do I compensate for the frequency dependent load inductor ?    

On Sat, 17 Mar 2018 00:09:28 -0700 (PDT), snipped-for-privacy@gmail.com wrote:



I think the answer is trivial, but if you refuse to show a sketch, I
refuse to talk about it.

On Sat, 17 Mar 2018 08:54:00 -0700, John Larkin

[snip]


Larkin's "gentleman/scholar" attitude speaks for itself.
        
                                        ...Jim Thompson

On Saturday, March 17, 2018 at 9:24:08 PM UTC+5:30, John Larkin wrote:


The solution is indeed trivial -- Zobel network.
Funny thing is that I had workrf on a similar  
problem about three years ago, derived the simple  
expressions for this simple but very useful  
sub-circuit, and then completely forgotten about it. The frequency response of a Zobel network is  
flat over any frequency range of choice, thereby  
"converting" a series R-L or series R-C load to  
a resistor.