That one just hissed :-)
Like Miss Hiss, a Sacramanto native:
-- Regards, Joerg http://www.analogconsultants.com/ "gmail" domain blocked because of excessive spam. Use another domain or send PM.
He watched too much Batman as a kid.
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Hmmm. I screwed up--it works for port A, but if you drive port B then Q2 robs R1, the common pullup source, which robs Q2.
I'll think some more...the general idea of sensing current flowing out of the port seems promising.
--James
Oh, make that zener 5.6. They zener better anyhow.
John
Sacramento has always been full of snakes.
John
s
I don't think that works. If you drive port B low, it has to sink current from port A, doesn't it? Oh, wait, now I see.
'B' needs a pull up to +5v, and must not go below Vthr (=3D0.4v) when A is driven, natch.
It'll be hard to get simpler than that.
-- Cheers, James
I'm assuming both sides have pullup resistors. If not, add them.
John
lups
eI think just one pullup to +5 on port B gets the job done.
James
Hmmm, that does pull up both sides. Good point.
John
pullups
save
AOkay, you need two resistors to set your threshold anyhow, so if you lend me just a couple more, we can sense the current direction through port B instead of its voltage and not worry so much about the absolute levels. This also allows A to safely pull B all the way to GND.
R4 senses B's current flow, R2, R3, and R5 establish a bias to keep the comparator output normally high.
+5V -O---------------------O- R1| | 5k | | | .-----O--------------. R2 | | 220k .-----'D1 | | / \ 5.1v /| R3 | R4 | --- /-|---O--5k--O--5k--O--- B | / | | | A -----O-----< | | | \ | | | |\+|---|-------------' | \| R5| | 220k | | --- -+- -5v -5vJames
o pullups
d save
ken A
| |Hey, R2's not doing much when B is 'open', not needed when B is 'low'. Ditch it and we save a resistor.
James
pullups
save
Yikes, too complicated for me in my present caffeine-free state. But I think the mpu side needs a pullup on reset- when the jtag is disconnected.
I hear water boiling...
John
m
two pullups
and save
sink
when A
=A0
=A0
=A0
R1 pulls up both sides, as drawn, but you can add whatever you want to port A to make the CPU side stiffer, if desired.
I dropped R2 from the diagram above to simplify it.
R4 senses when the B port is being driven. Just imagine both sides 'open,' then figure the drop across R4 when B's driven low and you'll see how R4 works. Next consider what happens when B is open and A is driven low.
R4 could be smaller--these swings and margins and impedances are all on the high side.
I think it works...
James
Caution: LT319's have 5.6V zeners across the inputs. I don't know if LM319's do also. ...Jim Thompson
--
| James E.Thompson, CTO | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona 85048 Skype: Contacts Only | |
| Voice:(480)460-2350 Fax: Available upon request | Brass Rat |
| E-mail Icon at http://www.analog-innovations.com | 1962 |
Spice is like a sports car...
Performance only as good as the person behind the wheel.
Bwahahahaha! Published schematics of both brands have significant errors. Sheeeesh! ...Jim Thompson
--
| James E.Thompson, CTO | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona 85048 Skype: Contacts Only | |
| Voice:(480)460-2350 Fax: Available upon request | Brass Rat |
| E-mail Icon at http://www.analog-innovations.com | 1962 |
Spice is like a sports car...
Performance only as good as the person behind the wheel.
or
ly 50 mW,
Not the relevant number. You need to know the temperature gradient inside the package, and the distance to the second transistor, to know the temperature difference between the two. It matters not at all if the first transistor self-heats to T+15, because its neighbor transistor might be thereby warmed to T+14.8.... If, for instance, you have transistors in E-W orientation, a hot W transistor can be heatsinked on the W side and the E transistor will experience no temperature difference from its neighbor (because negligible E-oriented heat flow implies negligible E-side temperature gradient).
Instead of temperature rise, remember we're trying to determine if 50 mW can heat the left side of a tiny speck of a package to 3C higher temperature (enough higher to detect with a finger applied to the area) than the right side of the same speck of a package.
Alas, you're right. I forgot a factor. Vbe same but T different by 3 K, means 1% absolute temperature difference, and Ebers-Moll says 27% current difference. For 1% accuracy, you'd need temperatures matched to more like 0.1 K. With zener current lowered (3 mA) and higher tolerance (+/- 0.7 mA) you can buy an extra order of magnitude, I suppose.
mW,
All-silicon mirrors don't work very well unless you use good monolothic pairs. Even some of the monolithic multiple transistors don't look very good to me, thermally. The really good ones have bits of transistor wrapped around one another to act as if they were really isothermal. So you're talking sole-source parts.
The separate-chip dual transistors are terrible thermally. The UPA800 looks to be a couple of hundred K/W differential theta, with a transistor-transistor thermal time constant of a few hundred milliseconds.
John
Was just thinking of asking / checking that and you looked already, so datasheets tell lies? I'm shattered... :)
Grant.
[snip]
Yep. Just shattered ;-) ...Jim Thompson
--
| James E.Thompson, CTO | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona 85048 Skype: Contacts Only | |
| Voice:(480)460-2350 Fax: Available upon request | Brass Rat |
| E-mail Icon at http://www.analog-innovations.com | 1962 |
Spice is like a sports car...
Performance only as good as the person behind the wheel.
The thermal problem is severe at 10 mA . It's manageable at 1 mA. It's minor at 100 uA. The old DAC-08 used matched silicon mirrors for 8-bit conversion, after all.
Let's not dismiss the humble mirror quite yet. There's multiple treatments:
(1) In this level-shift case, one could cascode the drive current, taking the thermal hit in an external transistor, if the logic margin allowed (pullup side, yes: pulldown side, probably no).
(2)The transistors can be made monolithic, interleaved, and their thermal packaging redesigned for balance. Never be ashamed to ask manufacturers to build better!
(3) Emitter resistors can be added (best if the mirror has a known current operating point, rather than varying by several orders of magnitude).
(4) Reduce the power. Lower the voltage, or the current, to this part of the circuitry. Heck, lots of 50 mW designs are improved by a 50 uW redesign.
(4) You can ignore the effect; a current mirror used to limit LED current in a flashlight is just fine with some variability.
(5) You can use the effect; a 27% signal change with 3C temperature difference is a bigger signal than thermistors would give you.
(6) You can null the temperature asymmetry if you balance the heat loads. That's the normal condition for the lower pair in Gilbert cells (the RF makes an imbalance, but it averages to zero over the long milliseconds).
That's both interesting, and disturbing. Why are multiple transistors not still easily available as monolithic duals, or monolithic mirrors? What happened to CA3096 (dual NPN and dual PNP in one chip)? Why aren't the thermal characteristics well documented? Did a thousand pick-and-place robots write in to the semiconductor makers and ask for the Martha Stewart special (two dice held together with hotmelt glue)?
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