biasing 74HC14 input to 1/2 VCC for small signals

As long as it's fed with that 4MHz clock it'll be ok. Try it without the clock.

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Joerg
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Some of us, well-versed in the art of electronics (the skill, not the book), know how to avoid that problem as well ;-)

...Jim Thompson

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| James E.Thompson, P.E.                           |    mens     |
| Analog Innovations, Inc.                         |     et      |
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Reply to
Jim Thompson

I wouldn't have gone down that route for a lower frequency signal with more timing margin.

*BUT* as the power to the board was controlled by the computer's 5V rail (it didn't have enough spare to use directly), the only way the clock could stop for more than a cycle or so (the ULA gated the system clock to interleave memory access for the video subsystem) woud be if the ULA had died or its crystal failed. At that point, I'd have been lucky if I only lost the 74AC00 which was socketed anyway.

It worked for as many years as I needed it, and no doubt, if I reseated all the chips and dug out and fixed a Spectrum, it would still work - IF I could find a readable copy of the software which is probably suffering bit-rot.

Reply to
IanM

I did it once by running the first stage as an oscillator that just locked onto the signal when one showed up. This produced utter disgust in a design review. It didn't even help when I mentioned that Drake and Barlow-Wadley had done similar things before (they hadn't heard those names).

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Joerg

Test question, what does this do...

C V2-----SW1----+--||---+--74HCU04----+----OUT | | | V1-----SW3----+ +----SW2------+

SWx are analog switches.

...Jim Thompson

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| James E.Thompson, P.E.                           |    mens     |
| Analog Innovations, Inc.                         |     et      |
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Reply to
Jim Thompson

about biasing a Schmitt trigger for sensitivity

This is appropriate for a signal with 50% duty cycle; some signals will benefit from a resistor divider with GND or VCC added to the output, instead of a single R.

It's sometimes useful to use an RC time constant that doesn't use the signal coupling capacitor, too; an RCR Tee in feedback accomplishes this.

Reply to
whit3rd

The input signal will have a ~10K input imput impedance and will be about

40VDC with 400mV of wiggle. The wiggle will be 1KHz square wave, with rounded edges and variable duty cycle.
Reply to
mook johnson

It oscillateth :-)

But only if V1 and V2 are sufficiently low impedance.

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Joerg

It doth not ;-)

Note that it's 74HCU04... do you know what that means?

(1) What does that have to do with it?

(2) Part of the "test" is to define when each switch is open/closed

Now! What does it do?

This will indeed separate the men from the boys, the designers from the hackers, those that understand electronics and those who can only make LED's blink ;-)

...Jim Thompson

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| James E.Thompson, P.E.                           |    mens     |
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Reply to
Jim Thompson

Well, you could use it to compare V1 and V2--e.g. close SW1 and SW2--inverter biases to its logic threshold and C charges up to V2-Vth. Then open SW1 and SW2 and (after a break) close SW3. If V2>V1, the output will be high, otherwise low. Not a great circuit for that, of course, except that it presents a very high impedance to V1.

Cheers,

Phil Hobbs

Reply to
Phil Hobbs

< 1mV equivalent offset voltage ;-)

...Jim Thompson

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Reply to
Jim Thompson

Sorry, shouldn't have read the thread subject line, mind was still in HC14 mode (and sore from some hammer-drilling).

When both switches are closed and V1 =! V2 ... phssst ... *POOF*

Measuring transconductance?

Other than that basically a linear amp where, in the absence of a series resistor, the source impedances will have to do to set gain. For younger lurking readers, figure 12:

formatting link

And for the uninitiated keep an eye on figures 7 through 9 ...

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Joerg

Sure, the offset will be low if C is big enough. A U-series gate doesn't have much gain, though, and the logic threshold isn't well controlled, so the subsequent stage has to do some fairly fancy footwork if V2-V1 is smallish.

Cheers,

Phil Hobbs

Reply to
Phil Hobbs

Run the numbers, VT drops out ;-)

Repeating myself, Vos < 1mV

...Jim Thompson

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| James E.Thompson, P.E.                           |    mens     |
| Analog Innovations, Inc.                         |     et      |
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Reply to
Jim Thompson

For your youth, you have way too much "phssst ... *POOF*"

Use of 74HCU04 was for illustrative purposes only... I'm doing this on a custom ASIC, with my personal roll-your-own inverter ;-)

...Jim Thompson

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| James E.Thompson, P.E.                           |    mens     |
| Analog Innovations, Inc.                         |     et      |
| Analog/Mixed-Signal ASIC\'s and Discrete Systems  |    manus    |
| Phoenix, Arizona  85048    Skype: Contacts Only  |             |
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 I love to cook with wine     Sometimes I even put it in the food
Reply to
Jim Thompson

Hmmm is SW2 connected correctly?

Mark

Reply to
makolber

close SW1 and SW2 wait a while for the current to subside as the gate biases itself into the linear region, then open SW1 and SW2 then close SW3, if the output goes low V1 is higher than V2 else if it goes low V2 is higher else if nothing happens both are the same.

there may be other equivalent or less interesting ways to use it too.

I didn't figure all that out myself.

Reply to
Jasen Betts

which schmitt trigger are you using that has ~50mv hysterisis?

if the docs for the chip you have say that the hysterisis will always be in the middle of the supply then youur circuit will work fine.

if you want more predictable results you could try a comparitor - then you can tune the hysteisis by adjusting the positive feedback.

Reply to
Jasen Betts

Depends where you put zero, which is more or less the point... That gate can equilibrate anywhere between 1/3 and 2/3 Vdd--and that's the zero point. If you're using this in an ADC in some biggish CMOS process (>90 nm, say), you can use more stages with the same threshold--which I gather is what you're doing.

It isn't true that the zero level is 0V, because that gate can't swing negative.

Cheers,

Phil Hobbs

Reply to
Phil Hobbs

Gross process (5V): 0.6um

I'm rolling my own W/L ;-)

...Jim Thompson

--
| James E.Thompson, P.E.                           |    mens     |
| Analog Innovations, Inc.                         |     et      |
| Analog/Mixed-Signal ASIC\'s and Discrete Systems  |    manus    |
| Phoenix, Arizona  85048    Skype: Contacts Only  |             |
| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  |
| E-mail Icon at http://www.analog-innovations.com |    1962     |
             
 I love to cook with wine     Sometimes I even put it in the food
Reply to
Jim Thompson

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