Basic doubt in I2C interface

Hi all,

I have got a basic doubt in I2C interface. In my s/m there are 4 masters(4 video processors). Now my question if all the 4 processors have the same device address,so they cannot sit on the same I2C bus. I need 4 differnt I2C buses. But then i am not using the I2C effectively. Any suggestions.

Thanks in advance , Praveen

Reply to
prav
Loading thread data ...

Hi Praveen,

On most chips of any complexity the IIC address should be configurable. Check this first.

If not, you could use a CPLD (writing your own VHDL) to modify the address of the chips. This is really more of a hack than a clean solution, but it should work.

Not only will you not be using the bus effectively if you have duplicated addresses, but you will have a fight on the bus (when the 4 processors simultaneously respond to a request).

Chris

Reply to
Apparatus

I dont understand what you are trying to achieve, by having the four devices on the one address.

As far as hardware is concerned, true I2C is open collector, so you wont do dammage. Normally I2C is fast enough, and I would doubt (unless you are actually streaming video) that the bandwidth limitations should be an issue.

I would put the devices on different addresses.

Paul

Reply to
Paul Rolfe

Actually I did not read your post properly. Most I2C IC's have addressing schemes, some of which are EEPROM, and you may have to put some option links on your board, for the very first time.

Reply to
Paul Rolfe

--
Go to sci.electronics.basics.
Reply to
John Fields

See a priest?

S/M - thats another newsgroup...

Don't sit on the bus, take the A-train uptown.

You're welcome.

--
Luhan Monat (luhanis 'at' yahoo 'dot' com)
"The future is not what it used to be..."
 Click to see the full signature
Reply to
Luhan Monat

You must be talking about Hs devices. They transmit an initial 'master code', which is used during arbitration. However, the master code is intended to be software selectable. If your devices have unchangable master codes, they are not compliant with the specification.

Your choices are to run the device in F/S mode, which requires no master code, or to use separate interfaces. Since devices always come up in F/S mode, and must be switched into Hs mode, it seems possible to force them to use F/S mode. However, I'd have to look at the datasheet for your device to be sure that is possible.

--
Regards,
   Robert Monsen
 Click to see the full signature
Reply to
Robert Monsen

As several people have answered you in your previous question, and as you seem dead set on ignoring, masters aren't addressed, only slaves. While it may be that your I2C masters are also accessable as slaves, unless you are planning to do so (which given your earlier question you have no reason to do), the fact that they share the same slave address is 100% irrelevant.

That said, until you sit down, read the answers that people give you, and read the I2C spec on the Phillips site, you're officially being written off as a waste of my keystrokes.

Reply to
Rob Gaddi

"prav" schreef in bericht news: snipped-for-privacy@posting.google.com...

Along with your previous question, I think you need to invent a I2C router. It should have its own address and some writable (and readable) registers that records which master has to be connected to which set of slaves. A master should set the correct path before accessing the slaves. The appropriate switches should be opened and closed to make that connection. You will still have collision problems when two or more masters wants to access the same set of slaves. You may need to define and implement a protocol to avoid collisions. (I have no patent on the idea, but you will need to pay me to develop it for you.)

petrus bitbyter.

Reply to
petrus bitbyter

ElectronDepot website is not affiliated with any of the manufacturers or service providers discussed here. All logos and trade names are the property of their respective owners.