But that's what you asked for ... if by hole you mean any other hole not a pin or via ... then don't add them to the ratsnest.... connect them after specctra has finished.
Simon
side
But that's what you asked for ... if by hole you mean any other hole not a pin or via ... then don't add them to the ratsnest.... connect them after specctra has finished.
Simon
side
An NMOS device is posted here.......
...Jim Thompson
check it out.
Anyone know how to load a netlist into a blank pcb?
looking
they
so that is the actuall image that would be imprinted on silicon? if so, that would suck to have to draw those lines by hand, good thing for CAD....
HI every1,
Iam designig a PCB using orcad(9). At the moment i have two boards(each is a two layer board). I have almost finished the design. But i just realised that instead of having two seperate boards it will be better to have one four layer board(or even 5 with a middle ground layer). I spent quite alot of time in the routing of these two boards. I dont want to redo everything. So is it possible to somehow combine these two seperate files (two seperate boards) into one 5 layer boards. Thank You.
Regards, Tamim
[snip] [snip]
Most are plunked down as a "cell", where all the layers are included in one "plunk" ;-)
...Jim Thompson
Someone can tell me if there is a group specifically dedicated to all questions about VLSI systems, from architecture to design?
Thanks
When i install LTspice under wine it doesn't complete the installation and gives me this error:
Couldn't find startup Shell Folder location
Can someone tell how i can resolve the problem?
Thanks
Hi,
Does anybody have a SPICE model for the Agilent "77 package"? It is a ceramic, surface-mountable package used for HEMTs, for example the Agilent ATF36077. I'm trying to find a complete RF model for this device, but Agilent gives only a model for the die, but not of the package. As usual, they don't respond to email queries either.
Mikael
kubik,
I haven't seen that error. I have three Linux machines in this office running RedHat 8.0 with WINE 20030219, RedHat 9.0 with WINE 20040716, and SuSE 9.1 with 20040716.
Anyway, I think you can ignore the error and just run scad3.exe. The error message occurs after LTspice has completed installing. It just means that it couldn't put a shortcut icon on your desktop, possibly a permission issue.
--Mike
I removed the hard drive from the dead machine and installed it into a USB adapter.... it's reading just fine.
However, if I leave it plugged in during a boot, the machine gets confused as to which drive to boot from.
My oldest son thinks there's a way, from "Disk Management" (Win2K) to render the external drive non-bootable.
But I can't find it.
Anyone know how to do it?
Thanks!
...Jim Thompson
-- | James E.Thompson, P.E. | mens | | Analog Innovations, Inc. | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | Phoenix, Arizona Voice:(480)460-2350 | | | E-mail Address at Website Fax:(480)460-2142 | Brass Rat | |
Good idea, I'll look for that.
Thanks!
...Jim Thompson
Hi all,
For multi-gigahertz analysis, a regular Spice model of the chip/die properties alone is of little use. You need to incorporate the device package's parasitic properties, too. But these don't seem to very easy to come by. Does anyone know of any sites where these additional model parameters for UHF+ analysis can be found?
Thanks,
p.
you would be best to ask this question at the Protel DXP newsgroup/listserver (from the protel site).
But you don't so much work with netlists anymore... but at the higher level. "Show Differences" from the schematic will generate an ECO which when executed will add components and nets to a PCB. "Update PCB" from the schematic should do the same thing but add a ton of other "useful" stuff. (at least someone thought it was useful)
If your trying to import a orcad generated netlist (i.e. foreign) I don't know, but someone should be able to help from the DXP listserver.
Simon
Paul,
..step param R 1k 5k 1k ; step from 1K to 5K in 1K steps ..step oct param R 1K 5K 10 ; step from 1K to 5K in 10 steps per octave
BTW, LTspice files aren't binary, they're ASCII:
--Mike
--- step.asc --- Version 4 SHEET 1 880 680 WIRE 368 32 368 208 WIRE 144 80 144 32 WIRE 144 32 368 32 WIRE 144 160 144 192 WIRE 144 288 144 384 WIRE 16 368 16 384 WIRE 16 384 112 384 WIRE 112 384 144 384 WIRE 368 384 368 288 WIRE 112 384 112 400 WIRE 96 256 16 256 WIRE 16 256 16 288 WIRE 144 384 368 384 FLAG 112 400 0 SYMBOL njf 96 192 R0 SYMATTR InstName J1 SYMATTR Value 2N3819 SYMBOL voltage 368 192 R0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V1 SYMATTR Value 20 SYMBOL voltage 16 272 R0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V2 SYMATTR Value 1 SYMBOL res 128 64 R0 SYMATTR InstName R1 SYMATTR Value {R} TEXT -80 144 Left 0 !;op TEXT -256 448 Left 0 ;.step param R 1k 5k 1k TEXT -208 264 Left 0 !.dc V2 5 -5 1m TEXT -256 480 Left 0 !.step oct param R 1K 5K 10
ok thanks.
Hi,
I've come across an odd problem in the simplified circuit I'm posting to a.b.s.e under the same subject title as this message. I can't seem to get LT to step through 3 drain resistor values whilst performing a DC sweep of Vgs. It should amount to just 30 iterations in total, but LT is sweeping through over 22,000 when I include "oct" in the .step statement. I can't get it to run at all without "oct" in that line and I've never had to use "oct" at all for a step run before. Can anyone tell me if the syntax for this kind of check has changed recently and/or what the correct syntax should be?
Thanks,
p.
Another thing to look for is "legacy UBS support" Basically it enables the USB to work in DOS mode,without windows drivers. If you have a USB keyboard,you might HAVE to have it enabled to even be able to press the F1/DEL whatever key to get into the CMOS,atleast you do on some of the older boards with USB. (IE,no USB no keyboard.)
Paul,
The help file is only officially supported document, but you can get that as a printable .pdf from
Another good source of info is the independent users' group at
--Mike
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