"Ought to" means that you are following hearsay. We use filters when it makes sense.
It's bad enough that you make statements that are uninformed or wrong, but you have to phrase them as personal insults.
Your story about applying for work at ASML summarizes the situation: your are way to obnoxious for your own good.
Please design a suitable tunable, adaptive filter and post it here. Cutoff from, say, 45 KHz to 45 MHz, glitch-free tuning. 7 poles would be adequate.
Or its residual slope.
A little hysteresis around the comparator might help, but I
Idiot. Hysteresis won't help the jitter at all.
What does help a bit is digital interpolation, between lookup table entries, at the full clock rate. We do that in several of our products. It is especually useful in products that have multiple DDSs on chip and allow cross-synthesizer moddulations, like our V346. Any DDS can AM/FM/PM any other, in compound paths. All the modulations are on-chip, and only the final outputs have DACs and filters.
Their full company name is Analog Devices.
A delay line that could be used to set
It escapes you because you don't actually design DDSs or their filters.
That seems to be your history, designing stuff that doesn't get built.
Get an ADI DDS eval board and learn something.
--
John Larkin Highland Technology Inc
www.highlandtechnology.com jlarkin at highlandtechnology dot com
Precision electronic instrumentation
Picosecond-resolution Digital Delay and Pulse generators
Custom timing and laser controllers
Photonics and fiberoptic TTL data links
VME analog, thermocouple, LVDT, synchro, tachometer
Multichannel arbitrary waveform generators
"Hearsay" is this context, is body of electronic knowledge that motivated the development of the DDS approach. An accumulator generates a sequence of digital phase values for the sine wave being synthesised, a look-up table turns this into a sequency of digital amplitudes, and a DAC turns this into a sequence of analog voltages (or currents), which ias a staircase approximation to the desired waveform. The Fourier transform of this waveform includes the desired fundamental and the undesired high frequency artifacts representing the steps in the staircase, which you can filter out to any desired degree with a suitable low pass filter.
All hearsay, until you build the hardware, but peculiarly reliable hearsay.
You do find personal insults where most people would merely find colourful language.
I upset the personal department by going behind their backs to talk to an engineer that I'd been interviewed by earlier. Personnel departments aren't good at evaluating engineers. Good ones know it and don't get too upset about being by-passed. Bad ones know it too but hate being reminded that they aren't as clever as they like to think. At ASML it looks as if the guy in charge was more interested in defending his right to act as a gatekeeper than in getting the right people through the gate.
e
What - precisely - is the application? The obvious solution would be clock-tuned FIR filter, where the filter shaped was determined by a bunch of resistors (or mabybe capacitors - I've not designed a capacitor based version, but I've a vague idea that it might be practical).
That sort of requirement usually means that somebody has screwed up their system design, and you'd be better off thinking out the system again.
Some devices do have a specified minimum slew rate for reliable operation; essentially this reflect the spectral distribution of the internal nosie sources (generally PSRR in practice).
If the comparator flips repeatedly as the waveform goes through 0V (or whatever threshold you've chosen) you'll have a nasty output. Hysterisis will prevent that, and the high frequency noise that the comparator will inject into the system as it flips repeatedly
If the internal noise around the comparator means that it flips once, but at an uncertain time determined by the amplitude of the noise divided by the slope or the ramp, you will have jitter, but that's just the second law of thermodynamics.
Digitally interpolating what, where? I presume you are using multiple DDS's to synthesise a modulated sine wave - which is to say that you are multipling the amplitudes in the digital domain
The term "process" refers to the sequence of operations used to convert a the surface of a silicon wafer into a integrated circuit. Some processes are optimised to produce digital logic, others to produce analog devices, and some can be used to produce mixed signal devices.
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Back when I was working on the Cambridge Instruments Electron Beam Testers for looking at the surfaces of bare chips while they were working, the customers would talk to us about that kind of stuff, but only in broad terms.
I've designed quite enough filters to appreciate where it gets interesting.
hing?
It's not the whole of my history by any means. The electron beam tester got built, and worked, but never went into production. Quite a bit of the less ambitious stuff did go all the way. You seem to concentrate on doing lots of little, less ambitious designs, and have more stuff that makes it into production.
If I had a potential customer for the knowledge that I might acquire, I'd do it like a shot. At the moment I'm more interested in looking at the Sydney job ads - I found two that I could reasonably respond to on Friday, and sent my CV off to the relevant agencies. I expect to get brushed off - after the Netherlands my expectations aren't high - but it does get my name into the database.
Settling in in Sydney is distinctly time consuming. We wandered around the Sydney Motor Show last night and my wife bought a car, which means more bureaucratic procedures to be dealt with.
They seemed friendly enough at the last Analog Devices seminar I attended - which looks as if it was in Eindhoven in September last year. I had more clout when I worked for Cambridge Instruments, and we once got a site visit from Barry Gilbert - I'd hoped to be able to sell him on the electron beam tester, but the RF parts he was pushing were a bit quick for the hardware we'd put together then. I'd had some ideas about coping with faster integrated circuits, but the priority at that time was on perfecting what we had.
Mike Terrell's can't imagine that I've got more money than he has. If I need that kind of stuff I buy it from Farnell. Finding some place to store it is more of a constraint.
Precisely. You are sacrificing potential long terms benenfits - very potential in this case, granting your limited capacity to exploit skills that might exceed your own - in favour of short term gratification.
Seriously, you'd be poison here, or to most productive engineering groups. You seem to have no genuine curiosity about electronics, no creativity or humor (they go together), and you have the people skills of a wolverine on a bad day.
--
John Larkin Highland Technology, Inc
jlarkin at highlandtechnology dot com
http://www.highlandtechnology.com
Precision electronic instrumentation
Picosecond-resolution Digital Delay and Pulse generators
Custom laser drivers and controllers
Photonics and fiberoptic TTL data links
VME thermocouple, LVDT, synchro acquisition and simulation
Strange idea. I've been a member of a couple of productive engineering groups, and I've remained in contact with the one at EMI Central Research (1976-79) ever since. I'm even linked to some of them on LinkedIn.
A bizarre misconception. Even you should have enoguh sense to deduce that this ins't true just from my posting patterns here - I don't spend all my time (or even a substantial part of it) correcting your misconceptions, though you are probably too emotionally involved to credit this.
The patents do suggest that I do have some capacity for creative thinking, and if you don't get my jokes your own sense of humour may be the one at fault.
It's a while since I posted a joke that I really liked - like the one in the thread "Op amp for division" back on April 11 1997 when I claimed that
"It is with a certain measure of schadenfreude that we in Nijmegen note that Harvard's semi-automatous expert help system "Winfield Hill" based on Paul Horowitz's electronics textbook "The Art of Electronics" has failed its extended Turing test."
but I do post intentionally comic stuff from time to time.
A claim that would surprise a large number of people that I know. Nobody has ever accused me of being good at flattery, which would seem to be the only people skill that you actually value, but there's a long gap between being direct and acting like a wolverine.
You would seem to be a perfect example of the kind of personnel department which has absolute faith in their less-than-reliable judgement.
Little of which saw production. Engineering that doesn't result in products is a waste of time and money.
and I've remained in contact with the one at EMI Central
LinkedIn is not productive.
When I suggest things you might explore, you claim to be bored, or demand to be paid to investigate.
That's the funniest you've been in 15 years?
Or at getting people to hire you.
which would seem
I'm not a personnel department. My company doesn't even have one. And I've hired lots of duds that looked pretty good at first. The trick is to get rid of them if they turn out to be duds. Most of the good hires here have been by informal contacts or by accident, not the advertise-resume-interview routine, which usually doesn't work well. I met my best engineer here on s.e.d. Our embedded programmer guy was the lab partner of someone we knew who was in school. My business manager is a lady I used to work on ships with, maintaining automation systems, when I first came to California. My IT guy is the son of a friend of my wife.
Luckily, California is a work-at-will state. We can lay off anyone at any time for any reason, as they can quit any time they feel like it. So if we don't have a mutually beneficial relationship, it ends.
--
John Larkin Highland Technology, Inc
jlarkin at highlandtechnology dot com
http://www.highlandtechnology.com
Precision electronic instrumentation
Picosecond-resolution Digital Delay and Pulse generators
Custom laser drivers and controllers
Photonics and fiberoptic TTL data links
VME thermocouple, LVDT, synchro acquisition and simulation
I didn't know what deadband refered to. Now I do, so the answer is I don't know. I take it Treadway's 9-gate wonder did not? How can you ever know without considering the output driver and filter characteristics?
My circuit is not 3-state, but at the time you asked for just an edge-triggered set-reset flip flop. Since it's never hi-Z even when locked I don't understand how it can have deadband. More jitter maybe since it over-corrects, but not deadband. I hope you can clarify that for me.
--
Reply in group, but if emailing add one more
zero, and remove the last word.
The deadband occurs where the phase difference is small enough that the PD2 output pulse width is less than t_PHL + t_PLH. The output pulse becomes a runt, and the phase detector gain K_phi drops to zero at zero phase difference.
The competing approach, used e.g. by Motorola back in the day, uses two separate outputs and subtracts them in analogue. That still has nonlinearity, but (a) K_phi only drops by a factor of 2 when one of the two pulses disappears, and, even more important, (b) the loop isn't trying to make the PD sit right on the flat spot, the way it is in the 4046.
Unlike the HC4046's VCO, PD2 is easy to fix--you just put a resistor to ground to pull it slightly off the flat spot. A few nanoseconds' worth is enough.
Cheers
Phil Hobbs
--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC
Optics, Electro-optics, Photonics, Analog Electronics
160 North State Road #203
Briarcliff Manor NY 10510 USA
+1 845 480 2058
hobbs at electrooptical dot net
http://electrooptical.net
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