CA3140 model. Again!

Is your test circuit in LTSpice form? I would like to fiddle with the model in LTSpice.

?-)

Reply to
josephkk
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I posted a model that Lostgallifreyan says is "peaky" in the negative direction, but otherwise looks good. I posted I based it on data sheet, choosing the largest of confusing "sink" terms. Suggested a tweak downward. Haven't heard back yet. ...Jim Thompson

--
                  [On the Road, in New York]

| James E.Thompson, CTO                            |    mens     |
| Analog Innovations, Inc.                         |     et      |
| Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    |
| Phoenix, Arizona  85048    Skype: Contacts Only  |             |
| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  |
| E-mail Icon at http://www.analog-innovations.com |    1962     |
             
I love to cook with wine.     Sometimes I even put it in the food.
Reply to
Jim Thompson

Jim Thompson wrote in news: snipped-for-privacy@4ax.com:

Lowering it didn't help. Raising it to 12 mA did, but an oscilloscpe of the real output shows a similar spike on the end of rising slopes where the model has none. Both are of about quarter the duration of the spike in the model output. (This in a differential amp circuit with 3K3 and 680R resistors for gain reduction, input to inverting side, noninverting side fed by 5.1V zener reference.)

With the real circuit and the model using 10K and 2K2 resistors the model's spike proportions are better, roughly equal for rising and falling slopes, with duration looking about right. The real circuit has larger spikes where the model's spikes shrank. The scale might be to do with parasitcs in the pindeck but I don't know why the change reverses, scaling upwards in reality, and downwards in the model.

Ok, any chance of an answer to my earlier questions now? :)

Reply to
Lostgallifreyan

Lostgallifreyan wrote in news:Xns9FEB1384C8CFDzoodlewurdle@216.196.109.145:

More... Raising that value further, to 15mA, makes the model's output much closer to the real one with both sets of resistor values in the diff amp, and also the output for the 10K/2K2 pairing is slightly larger than that for the

3K3/680R pairing, which agrees with the scale change in reality much better than using 12mA for that value.

Please let me know if you can answer my questions, I imagine that you likely have some op-amp in mind that does better than CA3140 for fast slew, single rail, and high resistance inputs. While I found LT1215 in my searches, there might be something cheaper and far easier to find that I don't know about.

I'm also still interested in trying parts models in the original incomplete model I made, if I ever find any BiMOS models with internal models to try. Knowing the zener voltages used in those four zener diodes will help though, I don't know what those are and I'm hoping you can tell me. Finally, assuming I don't find actual BiMOS models for the BJT's and MOSFETs, I imagine from what I see in other subcircuits, that maybe just three of four important parameters may be enough to modify a standard model in LTspice. What parameters might those be? Whther or not I can make a viable model this way isn't so important as what I might lear from trying, so please let me know so I have somethign to start with..

Reply to
Lostgallifreyan

One other thing that model seems to need is an additional 6.8pF of internal capacitance for compensation in its feedback loop. There's plenty I don't understand about this but I do know that a real one wouldn't need this in same context. Even if it is only real-world parasitic capacitance that tames the beast, it is nice not to have to add parts to a modelled circuit that don't need adding in the real one, and that extra 5.8pF does nothing to harm the modelled waveforms.

If there are any other problems I haven't seen any.

Reply to
Lostgallifreyan

Lostgallifreyan wrote in news:Xns9FEB1AAA6770Dzoodlewurdle@216.196.109.145:

Just found one... If I model a voltage follower and feed it with a negative voltage while running with a single supply rail, the output is -1.14211V. Tt should be impossible to sustain a negative voltage in this situation. I imagine small spikes might go south of the negative rail due to any inductance or capacitance present, but not DC.

Reply to
Lostgallifreyan

downward.

I saw a couple of models, i guess i don't know how to setup the test jig file. A couple of pointers on how to connect it to a symbol and include the subcircuit model should help.

?-)

Reply to
josephkk

josephkk wrote in news: snipped-for-privacy@4ax.com:

Save model as CA3140.sub in the sub directory (if using LTspice). Edit it to use just five pins, by replacing the line that begins .SUBCKT, like this: .SUBCKT CA3140 INP INN VP VN OUT Put an asterisk at the start of the original in case you ever want to use the offset null or strobe pins.

Then save the following as CA3140.asy in the op-amps subdirectory of the sym directory. There are other ways to link symbols with subcircuits but this is the most direct and easy to use. If you end up wanting a smaller symbol you can copy the LINE statements from it to replace the ones here, then edit the file in the graphic editor to move the pins. Just make sure if you do that, that you keep the pin order correct, and always 1 through N, LTspice doesn't accept gaps in pin count numbering.

Version 4 SymbolType CELL LINE Normal 12 -16 20 -16 LINE Normal 16 -20 16 -12 LINE Normal 12 16 20 16 LINE Normal -12 16 -12 32 LINE Normal -20 24 -4 24 LINE Normal -20 -24 -4 -24 LINE Normal -28 -32 -48 -32 LINE Normal -28 32 -48 32 LINE Normal 60 0 80 0 LINE Normal 16 25 16 32 LINE Normal 16 -25 16 -32 LINE Normal 60 0 -28 -51 LINE Normal -28 51 60 0 LINE Normal -28 -51 -28 51 SYMATTR Value CA3140 SYMATTR Prefix X SYMATTR ModelFile CA3140.sub SYMATTR Value2 CA3140 SYMATTR Description CA3140 4.5MHz Op-Amp with MOSFET Input/Bipolar Output PIN -48 32 NONE 0 PINATTR PinName In+ PINATTR SpiceOrder 1 PIN -48 -32 NONE 0 PINATTR PinName In- PINATTR SpiceOrder 2 PIN 16 -32 NONE 0 PINATTR PinName V+ PINATTR SpiceOrder 3 PIN 16 32 NONE 0 PINATTR PinName V- PINATTR SpiceOrder 4 PIN 80 0 NONE 0 PINATTR PinName OUT PINATTR SpiceOrder 5

Reply to
Lostgallifreyan

Lostgallifreyan wrote in news:Xns9FEBA85A1755Ezoodlewurdle@216.196.109.145:

Hello Jim, did you see this one? Also, the earlier one about unity gain stabilising capacitance..

Reply to
Lostgallifreyan

Neither one. I've been busy with "real" work ;-)

Elaborate on the follower conditions... are you saying output is below rail? What load did you have, if any? I'm thinking on a generalized OpAmp model which definitely solves such issues, but am embroiled in other mathematical niceties at the moment ;-)

What is the unity gain stabilizing capacitance issue? ...Jim Thompson

--
| James E.Thompson, CTO                            |    mens     |
| Analog Innovations, Inc.                         |     et      |
| Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    |
| Phoenix, Arizona  85048    Skype: Contacts Only  |             |
| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  |
| E-mail Icon at http://www.analog-innovations.com |    1962     |
             
I love to cook with wine.     Sometimes I even put it in the food.
Reply to
Jim Thompson

Jim Thompson wrote in news: snipped-for-privacy@4ax.com:

No hurry, I just nudged because I know that with time, it gets harder to return to any specific problem. (I'm learning C and some API stuff so I have the same problem here).

Anyway, it's no-load, -1.14V, 1K pad, -1.022V, 100R, -0.198.6V, so definitely iffy, as no amp can provide a DC voltage below its negative with any actual drive current. Inductive or capacitive spikes on pulses, sure, but not with steady DC.

The stabilising needed is to prevent a small fast noisy oscillation. Same reason it would usually be applied. The CA3140 is internally stabilised, so needs something done to prevent us having to add it externally. We can do it, but if we have to, it's safe to assume the model isn't accurate enough.

--

Remember I asked some other questions? Basically, what zener voltages for 
those four zeners in that schematic. I haven't ruled out playing around with 
that, and some minimum Spice parameters like Xti and suchlike to use to 
modify default LTspice native models for diodes and BJT and MOSFET for this 
NIMOS amp. I've seen many op-amp models that do this, using as little as 
three or four specied parameters, which suggests that even an ignoramus like 
me has a fighting chance of coming up with the goods purely by trial and 
error if you can tell me which parameters are the most important ones to 
modify for each internal part. I imagine there may be something specific to 
the BIMOS contruction that can guide to a choice for those parameters.

In short, my insticts tell me that staying as close to the original 
schematic, and using values common to each sub-modelled part, will get a 
useable model. It's a different approach to yours, but I want to try it.
Reply to
Lostgallifreyan

Lostgallifreyan wrote in news:Xns9FF4A3F402FE2zoodlewurdle@216.196.109.145:

??? I'm fairly sure I typed 'load' but never mind.. :)

Reply to
Lostgallifreyan

The CA3140 data sheet and _schematic_ are suspect. There are conflicting specifications. As an I/C designer the schematic has an "odor of mendacity" about it :-)

The model I'm pondering in my head takes my present basic model with GDC, GBW, slew-rate, Rout, phase-margin, and positive and negative swing limit specifiable... but modified as follows:

Rout => Rout-sourcing, Rout-sinking (separate values) Current limit sourcing and sinking (separate values) Power supply pins will reflect load _and_ quiescent currents Output swing limits specifiable relative to rail potentials

It may even show recovery time from slamming into rails... not quite sure yet, but I think so :-) ...Jim Thompson

--
| James E.Thompson, CTO                            |    mens     |
| Analog Innovations, Inc.                         |     et      |
| Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    |
| Phoenix, Arizona  85048    Skype: Contacts Only  |             |
| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  |
| E-mail Icon at http://www.analog-innovations.com |    1962     |
             
I love to cook with wine.     Sometimes I even put it in the food.
Reply to
Jim Thompson

Jim Thompson wrote in news: snipped-for-privacy@4ax.com:

But you see my problem... On the one hand I am told I have a datasheet that lies, on the other, a model that puts out negative DC in a way that might have precluded any need for switchmode generators of nagtive rails had it really worked that way in silicon.

Either way I'm at a loss.

Reply to
Lostgallifreyan

I modeled the output with only a current limit... no swing bounds except for the feedback. YOU violated the rules ;-) ...Jim Thompson

--
| James E.Thompson, CTO                            |    mens     |
| Analog Innovations, Inc.                         |     et      |
| Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    |
| Phoenix, Arizona  85048    Skype: Contacts Only  |             |
| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  |
| E-mail Icon at http://www.analog-innovations.com |    1962     |
             
I love to cook with wine.     Sometimes I even put it in the food.
Reply to
Jim Thompson

Jim Thompson wrote in news: snipped-for-privacy@4ax.com:

How so? :) All I did was try to measure the thing according your directions... It's looked extremely inconsistent so I understand that it can be hard to model, but I don't think working from a basic model will work, other than to create an idea of what it should do, especially if it ends up outputing steady voltages below its nagative rail. What's needed is a model of what it does.

Reply to
Lostgallifreyan

Didn't you say you input a voltage below negative rail? ...Jim Thompson

--
| James E.Thompson, CTO                            |    mens     |
| Analog Innovations, Inc.                         |     et      |
| Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    |
| Phoenix, Arizona  85048    Skype: Contacts Only  |             |
| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  |
| E-mail Icon at http://www.analog-innovations.com |    1962     |
             
I love to cook with wine.     Sometimes I even put it in the food.
Reply to
Jim Thompson

Jim Thompson wrote in news: snipped-for-privacy@4ax.com:

It doesn't matter. I used a -2V modelled input, but it's a high resistance input (several terohms probably) and I put a 1Meg resistor on it anyway just to be sure. No real world amp will maintain a DC output voltage below its negative supply rail, into a 1K load and still hold over a volt below that rail. That takes a lot more energy than will ever leak though that input from a -2V source. You can't get something for nothing in a real op-amp.

Reply to
Lostgallifreyan

You be not paying attention. Read every iota of what I've written today. ...Jim Thompson

--
| James E.Thompson, CTO                            |    mens     |
| Analog Innovations, Inc.                         |     et      |
| Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    |
| Phoenix, Arizona  85048    Skype: Contacts Only  |             |
| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  |
| E-mail Icon at http://www.analog-innovations.com |    1962     |
             
I love to cook with wine.     Sometimes I even put it in the food.
Reply to
Jim Thompson

Jim Thompson wrote in news: snipped-for-privacy@4ax.com:

it really does not matter WHAT happens here. You're asking me to accept a model that will output such that it holds -1V below its negative rail. I will not do that. No-one should. Real amps don't do this.

You can take any 1Meg resitor, Spice or otherwise, it won't hold more than

200 mV across a 1K resistor. Your model is generating, it is not merely being powered by a virtual supply, it IS one!

Browbeating me into appearing like a lazy noob is not going to distract anyone from this issue, as the model you posted is out there now for anyone to prove this.

Reply to
Lostgallifreyan

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