RS232 Interface

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Hi

I have an evaluation board with a target and a control FPGA. The control
FPGA is connected to the target FPGA over 32-bit local bus and can write
the data to a host PC over a RS232 interface. Both FPGAs are internally
clocked with 24MHz. So I have to implement on the control FPGA a
transmitter that gathers the 32 bits and sends them in 8 bit chunks to
the host PC. I wonder if somebody has some helpful ressources how to
implement such an simple interface. Also I have to implement a suitable
divisor for the baudgenerator to generate 115200 Hz from 24MHz.

Would be thankful for helpful comments and ressources ;)

Dan!

Re: RS232 Interface
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There are a couple of UART cores available on OpenCores that you can
take a look through.  Other than that, I seem to recall that Ken
Chapman's UART implementation that comes packaged with the PicoBlaze
core works pretty nicely.

--
Rob Gaddi, Highland Technology
Email address is currently out of order

Re: RS232 Interface

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I'd recommend you do NOT try to send a 32-bit word as 4 bytes
over a UART.  Instead, find some way to represent the 32-bit
word using plain text (printable ASCII characters in the
range 0x21-0x7E).  Plain ASCII hex is an obvious
choice, but rather extravagant (at least 8 characters per
32 bits); if throughput on your serial port is not a big
problem, plain ASCII hex is good because it's so easy to
generate and debug.  If you need better throughput, you can
use btoa or uuencode tricks to put the 32 bits into 5 or 6
plain-text characters.  Think, too, about how you can
reliably indicate the boundaries of your "here's a word"
messages.  A newline character on the end of your 8-character
hex word is an easy and reasonable choice, and again is very
convenient for debug.

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24MHz/13 is almost exactly 16x115200Hz.  Plenty close enough for
a UART clock, anyway.
--
Jonathan Bromley, Consultant

DOULOS - Developing Design Know-how
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Re: RS232 Interface
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A sample implementation for a serial receiver/transmitter with
explanations about the used methods can be found at the very
recommendable site

www.fpga4fun.com


Jürgen

--
Jürgen Böhm                                            www.aviduratas.de
"At a time when so many scholars in the world are calculating, is it not
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