disappointing 550Mhz performance of V5 DSP slices

On a sunny day (17 May 2006 14:44:54 -0700) it happened Eric Smith wrote in :

This is exactly the point. The question is: What will be first in the shops here locally: V5 or AMD 4 core!!!!!!!!!!

Jan,

V5 is in ES sampling, which means that the only way to get it is direct from your Xilinx FAE.

But, I have checked, and all the parts announced are on the shelf here in San Jose, so supply is not the issue (LX50, LX85, LX110).

And, parts had previously gone out to real customers in March, who actually had pcbs, and turned them on, and are using them. So that isn't a problem either (have pcbs, software, parts, and demo bitstreams even if you do not).

If you wait for it to be on the shelf at your distributor, perhaps your competition isn't waiting....

Aust> On a sunny day (17 May 2006 14:44:54 -0700) it happened Eric Smith

No need to. Software guys step up to architecture issues all the time, although major programming changes take training time, just as in hardware. The biggest hit is that the trendy object oriented designs are memory centric, and will always be to some extent. But even there, since objects instantiate from a pool by the creator for that class, and interfaces can be message oriented, it's very possible to design around classes that live on top of block rams and LUT rams, and use fabric bulk memories as a backing store.

Even with tradition programming styles, most are easy to fit into an FPGA, they just loose some of their performance when they single thread around a single memory object. Most current generation programmers are taught threading and messaging using distributed clusters, and that programming model scales into large FPGA easily.

With the upper end V5 LX330 devices being really LUT rich, computing on these things is easy. Now if they just cost the same as a COTS processor for equiv die size, it would be a huge win.

Do you have a ref on that (an url perhaps?) I'm really interested...

I tried Google but I'm obviously not feeding it the right keywords.

Thanks,

-- Peter

... or perhaps he IS hoping the that his competition isn't waiting. In the past, he'd come out ahead by staying on the released products if he:

• wants a sellable product on schedule since prototypes ES parts aren't recommended for production design (see
  formatting link

• needs to have parts that are guaranteed to be bitstream compatible with future production parts

• needs I-temp sooner than six months after the advertised date

• needs MGT's sooner than 6 months, no make that 12, oops, I mean 18, no wait... ?? months late (I saw your post early this week about this... it's nice to see a public fess-up).

And that's just V4. I believe I remember serious catches in V2Pro and V2ProX as well.

Xilinx has taught many of us many painful lessons over the past three years. Not to say that we wouldn't have had the same lessons with Altera, but engineering is about tradeoffs and having something available to sell to hit your market window, not blindly using the latest cool part because it just came out.

With best regards,

Marc

Marc,

Can't disagree with anything, except I did say that we are doing C and I grade at the same time for V5.

Hope that helps.

Aust> Aust>

Peter,

It (Intel's 'multi' core) was an invited presentation at SELSE II IEEE workshop in Champaign-Urbana in April 2006 (U of Illinois).

I have no idea if the slides will ever appear anywhere.

IEEE workshops tend to be less strict about providing material for publication.

Austin

Peter,

Found them!

Aust> Aust>

Brilliant! Thanks :)

-- Peter

Thanks Austin ... Great set of slides, wish I had seen the talk to go with them :)

I see this industry is headed down the design for defect management path too, and the huge wastes behind the zero defect policies are finally going to be addressed in at least that consumer market.

Austin,

Just a curiosity-driven long-shot, but did the presenter (or anyone else) give any clues as to what the interconnect fabric would be like? How similar to FPGA routing is it?

-- Peter

Austin Lesea ( snipped-for-privacy@xilinx.com) wrote: : All,

: A recent Intel presentation at an IEEE Workshop admitted that clock : frequency has max'd out, and now has to go down (not up) in order to not : create heat.

: We have known that for years now. So has AMD.

: The only choice is "multi."

: Intel proposes a future with more than 200 x86 cores on one die, with a : "communications fabric" and many memories. All on one die. Small : software problem to be solved by the need to have it solved....

: One attendee of the conference (not me!) quipped, "sounds like you are : describing a FPGA..."

: Boy did the presenter get mad! To be ccompared to a lowly FPGA! He was : spitting venom back at the attendee. "There is no comparison! FPGAs : are fine grained, and this is not!"

: Sounds like if that is the only difference, the FPGA wins. Again.

: Oh, and I can't wait for Intel to stub their toes on that : "communications fabric" (left as an exercise for the student). Or the : software.

It looks to me like different technologies - CPUS, FPGAs - are on a collision course - FPGAs are incoperating more and more advanced corse grained features and CPUs are segmenting, going parallel and more fine grained, there're flexible interconnects in the former and roadmapped in the later. Middle(ish) ground devices like offerings from Clearspeed and the STI Cell procssor already exist.

Convergence of the differnet hardware solutions is happening.

Perhaps the real battleground is the software environments - development and runtime. HDLs embrace parallelism naturally, but are stuck at a very low level, procedural languages map to how most people thing and how CPU cores work, and stink at parallelism. Many attempts are in various stages of existence for a mix between these two extremes, none have yet to find acceptence, and none (AFAIK) are usable across the range of technologies.

Perhaps this is the real battleground?

cds

Not Really, software is one component of the greater architectural problem. What it does show is that Intel is willing to address cost issues, which are critical in the consumer and high end systems markets, while mappi9ng a course that will intersect with the cash market that Xilinx is seeking to grow into. Any die with hundreds of cores becomes a cluster on a chip and will need ready access to high speed external connects for memory, storage and communications.

The solution that Intel maps out, intersects solidly with using Xilinx parts for reconfigurable computing, and it would not suprise me of at some point the end solution was a mix of ISA cores meshed into FPGA fabric.

While FPGAs are very low density functionality wise with high overheads in little used interconnects, a dense ISA core design will have both high functional density and high utilitization on the interconnect by using both bus and on chip networking solutions. When these two architectures turn into systems, the Intel design provides more usable performance for the buck.

Given Xilinx's inability to think visonary at the systems level and manage costs by design of their product and process, I suspect one likely course is that they are swallowed up with the stroke of a pen for their patents by a consumer level systems company. Sun, Intel, AMD, Sony, Fujitsu, etc ....

The whole Itanium 64 bit thing has been the best case of doing something stupid, as heat and power grow faster than usable performance. The other end of the spectrum is bit serial, which has high architectural overheads. The sweet spot in size, heat, power is a dense fabric of simple cores, and lots of them to deliver the performance ... which is where reconfigurable computing has had it's small wins by building that using an inefficient FPGA technology.

Wearing my Sr Architect hat, I've looked past FPGAs as the short term solution, into a path not that different in strategy to Intels ... but not using large x86 ISA cores, using something much smaller and cache dominated to balance the memory/processing ratio.

cds,

Very astute.

I agree with you.

When we get together, and ponder the future, is it the technology, architecture, or tools?

Or, is it all of the above?

More and more of our customers want a 'pre-baked' solution that they can add their 'secret sauce' to (sorry for the mixed metaphor, not very appealing...no one bakes burgers).

How can anyone possibly create IP for every possible application? Yet, that is what we are being asked to do.

I hope you found the link to the pdf of the Intel talk that was also posted by me. It is certainly worth looking though, especially since Intel felt it was worth presenting. The caveat is that this presentation of Intel's is just one of many possible futures.

How the future may change may not be obious, but it will change.

Austin

c d saunter wrote:

It's certainly all of the above, as being weak in any area just drags down the ability to perform well in the other areas. Having the vision to staff broadly and design broadly is the difference between a technology vendor (IE FPGA/CPLD company) and a systems level company (that architects, designs, and implements) with both broad market and detailed systems level implementations as core architectural/design constraints.

pre-baked is just another word for systems level requirements.

Yep ... which is a real problem. Xilinx is too small to be a full systems level company (and isn't staffed with the vision to become one in the short term), but rather sees itself as a technology only company (a rather big fish, in a very little pond).

There are ways to deal with it ... like leveraging the customer community as a broad partnership to provide the parts that Xilinx hasn't, or cann't, staff and manage well ... systems level architecture and systems level software. But that does mean that Xilinx needs to be much more customer oriented, have an open interface to cusomter community, and actively seed, support, and foster that partnership. Open source is one of several alternative models to leverage the customer community to fill in the rest of the solution to drive changes in architecture, software, and tools.

yep :)

John, you like to point out that Xilinx is not a systems company, and you probably are right.

But let me also point out that I know of no company that is simultaneously good at broad-based systems and at broad-based components.

Most of the system companies you mention are abominable at components. Sun and IBM never were seriously in the component business, except for internal consumption. Intel is very narrowly focused on a certain systems and a narrow components sector, as is AMD. They are both getting better and better at less and less.

Xilinx is focused on programmable devices for a very wide range of systems applications, from glue logic in cell phones to telecom routers and medical / instrumentation / mil/aerospace applications. Reconfigurable computing, large on your RADAR screen, is a tiny part of our business (and attention).

In order to be successful in our chosen field, we have to satisfy many conflicting requirements and many different customers. We are not perfect, but we are not as bad as you try to make us look.

Peter Alfke, Xilinx

Systems companies span from embedded to super computers, both ends of which cover both ends of the Xilinx product line and target markets. The lack of systems level tools for both ends is clearly a problem in getting broader market penitration to drive chip sales.

Nobody is perfect, that is for sure. Speculating about futures isn't so much about making Xilinx look bad, as being objective about core limitations that impact potential success and bottom line growth for your stock holders -- and design in decisions by your chip customers.

There are clear dollar limits that Xilinx can achieve as an FPGA and PLD supplier, and the huge amounts of dollars get spent for systems level tools that don't drive high volume chip sales or turn into high revenue sources (like expensive development boards, ML310 for example). That market I suspect will be the target of off shore competitors with a mean and lean agressive competitive style ... something Xilinx isn't, and patent protection for those markets will remain difficult with core patent expiration and lots of prior art.

Having Intel propose chips which severely cut away at the upper end of Xilinx's market, with a large number of cores and interconnect fabric, will ultimately limit severely Xilinx DSP, communications, and specialty reconfigurable computing sales for high end applications. All markets that Intel has targeted before, and continues to. Including PPC cpu cores and communications interfaces on FPGAs puts Xilinx clearly in Intel's sights. It's not hard to figure out which of the two companies has a strong alliance with software developers to deliver systems level solutions in high volumes, or to compare the degree of openness to 3rd party developers.

Being a chip supplier and a systems company is a difficult balance, as one competes with the other divisions customers either way. So there is a reason that Sun, HP, IBM, SGI had problems selling chips and systems at the same time .... and is almost certainly why Intel walks a careful line doing so as well. Even Motorola had a difficult time at it, did some spinoffs and became a systems level company. That solution, which some have used, is to spin off the chip technologies as arms length divisions, that are only partially captive, combined with licensing.

So that certainly begs the question today, of where is Xilinx headed in the market with their technology given threats to both the bottom and top end that are likely. So just where and how is Xilinx going to maintain their "market share", revenue and profitability, to avoid a stock holder purge of the current Xilinx management? I don't think it's another decade of business as usual. Do you?

Now is a critical time in the market, as nearly every company is trying to plot their future for the next 7 years to ride the next tech wave, before the next bubble burst in the early to mid 2010 decade. With that comes a lot of second guessing long term viability of suppliers critical to your product line and strategy, plus buying into certain technologies with are core to your product.

If Intel, AMD, IBM, and some half dozen other large players are headed into the high core count highly integrated cpu business, they will run into Xilinx and Altera's patents ... where litigation or licensing may be far more expensive than purchasing 15-25% of the common stock and doing a takeover without a bidding war . That is one potential to consider, that either or both of the high end FPGA companies may go largely capitive for their IP value. Xilinx thumping around with we are taking over the world and circle the drain talk, could make the more likely, than sliding under the radar. Similar consolidation is possible at the bottom end too.

Another is that Xilinx and Altera, which have been moving up into the embedded systems CPU business, go ahead find some way to expand solidly into systems businesses in one or more markets, plus sit the fence as a chip supplier to smaller systems companies in other markets. Follow the Motorola path, more or less.

The current road map of expanding share holder returns by continuing to expand into Intels market, doesn't look nearly as rosey these days.

Given other Xilinx employees posturing and dissing, even in this thread, shouldn't be so thin skinned when someone provides counter points.

Looks like it's going to be an interesting "multi"-year industry change :))