I know that DMA plays an important role in current onchip communication architecture of many microprocessors. But I don't know what kind of metrics we can use to describe the performance of a dma design. For example, channel numbers, transfer speed, logic resources occupied... Is there any paper or articles describing the difference or giving an comparision of different structure of dma?
The fastest DMA is using the clock itself. Slower ones use divided clocks. You could have multiple simultaneous channels and they could be of smaller width than the cpu. That's about it.
Rene
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Even slower ones are implemented in the processor microcode rather than hardware. Like the original NEC V-25.
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I remember rejecting that for a 64180 about 20 years ago, because its DMA access was slower. Both units had the same maximum clock rate at the time. The difference allowed me to capture the front end data burst.
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