Debugging designs that are running on FPGA

Hi

I have a simple question. I have a design where the RTL simulation is working. Now I would like to see if the design also works then on the FPGA. The obvious way would be to use the JTAG interface and see what is going on in the CHIP. Anyway, is there somehow another way this could be achieved? For example is there somehow a way that a file could be written to which I can get them someway access? Or is the JTAG the only option I have?

Cheers Paul

Reply to
Paul
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Hmm. It'd probably be easier for you to pipe the outputs of some important internal signals or registers to the I/Os of the FPGA (where you could hook up a logic analyzer, or even attach LEDs if the output is simple enough to understand).

Of course, this might be hard to do in some designs (since it may alter your critical path timing), or you may not have any I/Os to spare. But this is a pretty easy debugging technique that I've found to be relatively successful in the past.

K.

Reply to
Kris Vorwerk

What FPGA you are using? What kind of interfaces are already available on your design? How much data do you want to capture? How fast?

Typically, I already have some sort of interface that goes to a computer, allowing me to capture data to a file. I commonly include some debugging circuitry within my designs that allow me to steer intermediate data to the output, so that I can verify the operation of different stages in the data path.

I kind of infer from the way you phrased the question the you don't want to use Chipscope? If that assumption is wrong, and you have a Xilinx FPGA, then how about Chipscope? It does exactly what you are asking about, though it does use the JTAG port.

Reply to
Duane Clark

I usually design a debug bus into the fpga which outputs its signals on a few pins. A mux allows me to select the signals from particular module inside the FPGA. In this way I can monitor both internal and external signals using a logic analyser.

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Reply to
Nico Coesel

I think you ask for a Hardwaretester (or do you really think, a file could be created inside the fpga). Google for them and ask yourself, if you could life with lowcost or need a more expensive unit above the 100k.

Most other solutions use jtag, some are direct from fpga vendors like chipscope pro from Xilinx or silicon explorer from Actel other sollutions like tementor claim to be vendor independend.

bye Thomas

Reply to
Thomas Stanka

Hi

I am using a Xilinx Virtex II XC2V6000 board, and I have a simple processor running on it. So the simulation in Modelsim is working fine, and I have to check wether the register content or the memory content on the FPGA are the same as in the simulation! So either I have a way to see what is written in the registers in the end or I need a way to have access to the data written into the RAM. How fast doesnt matter, I just need to know now for a start, that at the end of the computation I have the correct result!

That sounds interesting, maybe also useful for me. Are there some webresources that tells me the basics whats the best way to achieve this?

Yes I have chipscope and JTAG, so maybe thats then my only chance if there is no other way to do that!

Reply to
Paul

If there is a processor running, do you already have a uart connection? If not, do you have a couple of pins accessible that you could attach to a uart chip? I like to write a simple monitor that I can access via a uart, that allows me to type simple commands to read/write memory and some important register values. A simple uart monitor program with a couple of commands is very easy to write, and requires very little code. I have also done purely VHDL implementations of a uart monitor, that allows the same kind of reading and writing of data.

If this is something you only need to do a few times to check that things are working, then I would think chipscope would be by far the easiest. If it were something you wanted to look at repeatedly over a long period of development, it might be worth writing a uart monitor.

Reply to
Duane Clark

If your processor ist allready working in principle and you just want to be sure you can compile GDB for your processor or at least a GDB target.

But still you need to get the data out of the chip. As there is no slot for a disc or a usb stick on an fpga, you need some other interface. JTAG is a good solution and there is software available (GDB, ChipScope, GNAT, ...) but in principle any interface that can send data is possible. I am sure many people use RS232 or Ethernet with GDB.

Kolja Sulimma

Reply to
comp.arch.fpga

For this part, I really don't know of web resources. The way I do it is very much implementation dependent. I have done boards for VME, PMC and PCI busses, so I simply use that interface to get data into the computer. The thing I am currently working on has a RocketIO link, and I have another board with a RocketIO link plugged into a computer, so that is where I steer data to. That was why I was wondering what interfaces the board currently has.

Reply to
Duane Clark

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