I am building a system with 1 master (normal) and 3 or 4 slaves. The question is: How do I organize this so that I can 'load programs' using ICSP to evey master / slaves without to much handeling like jumpers, to set /remove re-wiring temprary etc.. (documentation show 1 master 1 slave with some resistors on SPI lines. Can load the master but doesn't indicate how to load the slave, and nothing if there are multiple slaves! ) Many thanks in adavances
What is the system? What is the documentation?
Some such parts have chip selects that tri-state the slave out when the chip's deselected, which allows you to connect chips in parallel. Other parts (there's some overlap) run their internal shift register to their slave out, which allows you to daisy-chain them and more or less treat them as one device with a really long shift register.
You need to study the data sheets on all the parts and see what you can do.
-- Tim Wescott Wescott Design Services http://www.wescottdesign.com
SPI is a non-standard standard. You need to read the documentation and then reread the documentation for each of the devices you are using. That's the best advice I can offer with the information you've provided.
-- Rick
Being ignorant,what i would do is use N buffers at an output,each one to drive a given slave 1-N. Probably useful to buffer each slave output to prevent excessive loading. There are tri-state bi-directional gates (may not have numbers correct, been 30 years) like the LS240, LS244 set that might be interesting here.
Not sure what problem you are trying to solve.
-- Rick
If you are thinking about Atmel processors, then programming lines are just SPI so in principle can be shared. In case of Atmega 328P the same lines are used for programming and for regular SPI -- you may connect them together. To select chip for programming you need to pull its reset line to low. So you probaly need some I/O chip to drive reset lines of processors to select which one is programmed. You also need to ensure that during programming there is no other traffic on SPI bus. If all goes well you should be able to stop normal SPI trafic mostly in software. But presumably you are reprogramming to fix some problem and assuming perfect software is not wise. So a more robust way may be to apply reset to all processors and put multiplexers on SCK or maybe an all SPI lines.
I wonder why you want to use ICSP. For inital programming a prototype jumpers should not be a problem. For initial programming during production it makes sense to have separate connection to each processor and external multiplexer. Once initial programming is done you should be able to reprogram purely in software. without need for ICSP.
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Waldek Hebisch
This is what I intend to test soon ( say in a week or two). BTW: I am retired and doing this for fun?? ;-) Andre
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