Seeking more input on hobbyist demo/educational stuff

What? Garage to highway before non-essential stuff all boots up? I cringe.

Jon

Turns out Basic52 is still available on the net, with docs in html/pdf/word...

Elektor did a spruce-up, ~2001, and someone added i2c, so it could match up well (tweaked) to an AT89LP51ID2, which has RTC/ADC/i2c/SPI/PCA and 2K XRAM and 4K EEPROM - enough to do a useful one-chip BASIC. ( it also has a ROM loader, and OCD pins )

Just for fun, I downloaded the many-fixes v1.31 ASM from here

and fed it into the free Atmel Assembler, and it worked...

LPDS will even launch/simulate the code, if you hand-hold the debug DisASM step. (6 clicks yes, 6 clicks no)

You cannot quite do RTC and On Chip Debug in the historic DIP40 package, as Atmel only do those in the PLCC44, but PLCC44 is 'near enough' ?

There is a DIP40 AT89LP51ED2 @ Digikey, if someone really wanted DIP )for existing designs?) The DIP40 drops the RTC and OCD.

-jg

My experience with Atmel is that the level and quality of support depends on the particular product. Different products are developed in different areas of the world. I had a number of questions about the SAM7 parts when they were new and it was like pulling teeth to get answers from France. I was being told by crystal makers that I needed a spec on the required ESR to get the crystal to work reliably. The response from the French developers (through the local FAE) was to use the rather large one on the eval board. When I pushed back saying I had to have something much smaller, they came up with ESR requirements for four frequencies with no indication of what to use in between those numbers. I couldn't get any further clarification. I thought this was pretty poor considering that we would be buying 10's of thousands of units.

BTW, crystal ESR wasn't in the data sheets at all until I asked about it. Funny, in the 2006 data sheet for the ATMEGA164 I only see ESR specified for the low frequency crystal. I also see that Atmel is among the paranoid IC makers, their ATMEGA data sheet is protected from copying text, bizarre.

Rick

I have experience of this kind of problem.

It was not in a car, but in a Thielert airplane diesel, converted from a Mercedes turbo engine. In take-off acceleration, both engines reported failure in ECU B, and the take-off had to be abandoned, of course. In all ground tests, everything was OK. After losing nearly the whole summer's flights, it was finally found out that there was a puddle of water in the ECU B units. In the take-off acceleration, it splashed enough to short something in the electronics. The water did get in between the outer sheath and the individual wires of a cable, and then through the inside of the MS connectors, well inside the gaskets.

--

Tauno Voipio

I am not sure of every latch but definitely every cpu register.

w..

Physics, chemistry, strengths of materials, electrical noise, math with a little coding in thrown in is the life of a ECU programmer.

Water and just about any salt is acidic, I have seen engine ECU's that looked like they have been operating in acid not to mention the electroplating effects of copper in a forced march around printed circuit boards.

The amazing thing is that most of these boards continue to function reliably.

w..

match up well (tweaked) to an AT89LP51ID2, which has

one-chip BASIC. ( it also has a ROM loader, and OCD pins )

DisASM step. (6 clicks yes, 6 clicks no)

package, as Atmel only do those in the PLCC44, but PLCC44 is 'near enough' ?

)for existing designs?) The DIP40 drops the RTC and OCD.

Thanks so much for putting in this effort. Much appreciated!

Jon

On 05/10/12 22.46, Jon Kirwan wrote: ...

...

Hi Jon

Have you thought about mentioning clockless embedded microcontollers?:

13 July 2011, Inside Manchester?s million ARM electronic brain Quote: "... The 18 core IC is claimed to deliver the computing power of a PC and dissipate 1W, said the University.

The chosen core, for which ARM has granted a licence to the University for the project, is the ARM968, ironically the first ARM not to have Furber's fingerprints on it.

"The ARM7 is still recognisably mine," he said. "The ARM9 has a five-stage pipeline and Harvard architecture. The ARM7 has a three-stage pipeline and von Neumann architecture. These are the two design sweet spots. Anything more complicated is less efficient, and the 968 is particularly energy efficient."

Stated consumption is 0.12-0.23mW/MHz on a 130nm process. ... Both are based on a delay-insensitive communication technology developed at the University of Manchester.

Furber is a fan of asynchronous communication and previously developed an series of clock-less asynchronous ARM cores called Amulet. ..." ftp://ftp.cs.man.ac.uk/pub/amulet/papers/LAP_IEEEDandT_07.pdf

Asynchronous circuit:

Quote: "...

70% lower power consumption compared to synchronous design[5] ... Less severe electromagnetic interference (EMI). Synchronous circuits create a great deal of EMI in the frequency band at (or very near) their clock frequency and its harmonics; asynchronous circuits generate EMI patterns which are much more evenly spread across the spectrum. ... Synchronous designs are inherently easier to test and debug than asynchronous designs.[7][dubious ? discuss] ..."

6/10/2010, Time is right for clockless design:

6/4/2012, Tiempo, ST announce 32-nm asynchronous design flow:

6/1/2012, MCU Operates Without Clocks:

Recent Advances in Designing Clockless Digital Systems:

Quote: "... Benefits (vs. sync):

• 3-4x lower power (and lower energy consumption/ops)

• much lower ?electromagnetic interference? (EMI)

• instant startup from stand-by mode (no PLL?s) ... Critical Design Issues:

• components must communicate cleanly: ?hazard-free? design

• highly-concurrent designs: harder to verify! ..."

ARM996HS

/Glenn

rickman wrote: [ ... ]

Bizarre, indeed. I haven't found that myself, before, or with the 3 docs I have now -- doc2545.pdf, doc8271.pdf, doc0856.pdf . I'm looking at them with Gnome Image Viewer, which maybe has a different opinion whose side it's on, between the user and the owners.

Mel.

You should never use Wikipedia as a primary source. This quote includes the reference number which is what you should have looked up and quoted. If you had, you would realize that this is not a valid statement and only applies to one Epson processor in a marketing press release.

Async processors may be lower power than synchronous processors all other factors being equal, but when are all other factors equal? The devil is in the details so that on any given day, any team in the NFL can beat any other team in the NFL. er... I mean any new processor can beat last month's best processor. It also depends on your application. Just look at the GA144 burning >10 mA waiting for a reply to a prompt! I can beat that with nearly ANY current processor if I code it properly.

Rick

I checked a few slightly newer Atmel docs I had and they weren't locked for copying, but they are password protected and don't allow commenting. So print it out and write in the margins!

I've seen this with a few companies. I don't have any idea why they have to be so paranoid and it *does* make a difference to me when I consider using their parts. It makes my job harder.

Rick

Whenever I see that, I assume the publishing dept is more inept, than paranoid. A comment via email usually fixes it.

I just tried Atmel AT89LP, ATXmega and ATmega8u, and all copy fine in acrobat. Seems to have been fixed ?

-jg

Worth a sidenote, but they tend to be very much niche parts. Clockless devices have been 'coming' for over a decade and this Caltech paper

mentions 1988 as a starting point.

Once microcontroller vendors moved to on-chip regulators, that control means less pressure for async designs. Some parts have a decoupling pin for their regulators, and some manage to (somehow) avoid needing that pin.

-jg

paranoid.

acrobat. Seems to have been fixed ?

There are some 10 or 12 properties that they can lock down. Type cntl-D in acrobat and see what it says on the security tab. Sometimes printing and commenting are locked which I can never see a reason for.

It may be that someone at Atmel thought it was a good idea to control their PDFs the way they used to "control" blueprints. But data sheets going to customers are a very different animal. We should at least be able to scribble on them like we could paper, sheesh!

Rick

less pressure for async designs.

(somehow) avoid needing that pin.

I don't follow. How does the on chip regulator change the utility of async processors? The EMC noise is just a side benefit in my opinion. I think the main utility is the claimed lower power and potential faster processing although I'm not sure either has really panned out.

Rick

Without a regulator, chip designs are forced to run at the Vcc that may no t match the process sweet spot - just compare the Icc/Vcc/Freq plots of a n on-regulator controller, with those using a regulator.

If you can drop the core voltage, to anything you like, you can match your process sweet spot, and you also gain on the Cpd Calculation :

PT = Cpd
*(V^2)*CC*
fI*
NSW

Note that square law, on the power vs voltage swing.

The on chip regulator also means users do not care what process, or point on the process curve, the chip vendor might choose. At most, it just costs them a decoupling cap.

-jg

paranoid.

acrobat. Seems to have been fixed ?

I really, really hate to mention it, on the theory that if this becomes too well known then somebody with enough DMCA lawyers will "fix" it, but the PDF-Tools app from Tracker Software (The PDF XChange reader folks) can usually (on 100% of the one's I've tried but that's a small subset) create an un-protected version of vendor datasheets.

I agree, I hate not being able to add highlighting or "Don't skip this step, dumbass!" notes to myself. To be fair, the recent Atmel datasheets I've come across do permit commenting, so for normal use their security settings don't get in the way. Nice to have away around those that do.

--
Rich Webb     Norfolk, VA

Hi Rick

Did you notice:

Recent Advances in Designing Clockless Digital Systems:

Quote: "... Benefits (vs. sync):

• 3-4x lower power (and lower energy consumption/ops)

• much lower ?electromagnetic interference? (EMI)

• instant startup from stand-by mode (no PLL?s) .... Critical Design Issues:

• components must communicate cleanly: ?hazard-free? design

• highly-concurrent designs: harder to verify! ...."

from:

Steven M. Nowick:

Quote: "... My main research interests are: the design and optimization of asynchronous and mixed-timing digital circuits and systems; networks-on-chip (NoC's); interconnection networks for shared-memory multiprocessors; computer-aided design (CAD) tools; logic synthesis; fault tolerance and reliability; encoding techniques for low-power delay-insensitive communication; and ultra-low power digital signal processors. ..."

You can of course ruin every low power embedded system by bad software or hardware; implementation or design - that everyone working with embedded systems knows.

Glenn

On 13/10/12 20.09, rickman wrote: > On 10/13/2012 10:35 AM, Glenn wrote: >> >> Asynchronous circuit: >>

>> Quote: "... >> 70% lower power consumption compared to synchronous design[5] > > You should never use Wikipedia as a primary source. This quote includes > the reference number which is what you should have looked up and quoted. > If you had, you would realize that this is not a valid statement and > only applies to one Epson processor in a marketing press release. > > Async processors may be lower power than synchronous processors all > other factors being equal, but when are all other factors equal?

Hi Rick

Did you notice:

Recent Advances in Designing Clockless Digital Systems:

Quote: "... Benefits (vs. sync):

• 3-4x lower power (and lower energy consumption/ops)

• much lower ?electromagnetic interference? (EMI)

• instant startup from stand-by mode (no PLL?s) ..... Critical Design Issues:

• components must communicate cleanly: ?hazard-free? design

• highly-concurrent designs: harder to verify! ....."

from:

Steven M. Nowick:

Quote: "... My main research interests are: the design and optimization of asynchronous and mixed-timing digital circuits and systems; networks-on-chip (NoC's); interconnection networks for shared-memory multiprocessors; computer-aided design (CAD) tools; logic synthesis; fault tolerance and reliability; encoding techniques for low-power delay-insensitive communication; and ultra-low power digital signal processors. ...."

You can of course ruin every low power embedded system by bad software or hardware; implementation or design - that everyone working with embedded systems knows.

Glenn