MIPS vs ARM architectures

Hi all, I've been curious about the relative merits of ARM and MIPS and just stumbled across a thread from March in which this was discussed a bit

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I'm a physics student and have gotten interested in RISC processors, since taking a course on Verilog/FPGA. I've been playing around with the open-source MIPS cores uCore and YACC (from opencores.org), and it's pretty fun to get a 100 MHz MIPS processor running on my Altera development board.

I was under the impression that ARM's instruction set allows for denser code (even without Thumb), since it allows barrel shifting in arithmetic instructions and post-increment of index registers. It seems like a very clever design to me. On the other hand, MIPS has twice as many registers,

32 vs. 16. And all (I think?) licensed MIPS processors include an MMU, while many ARM cores do not have an MMU. Then, ARM is more popular it seems, but has very high licensing costs. And ARM's assembly language might be easier to work with, but which is better for compilers?

I'm wondering what others think... what are the relative merits of the two architectures? Am I correct to think that MIPS might allow faster clock speeds and smaller dies, because of its simpler instruction set? Anyway, I'd love to know what others think. Myself, I have only coded assembly language for x86 and AVR (8-bit RISC microcontroller), so I don't have any low-level experience with 32-bit RISC.

Thanks!

Dan Lenski

Reply to
Daniel Lenski
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Phil Koopman wrote an interesting book that compared processor architecture and provided some notions to examine the different styles. The book is now downloadable from

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Paul E. Bennett

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Then you should also look a FPGA specific 32 bit cores too.

So, that means BOTH vendors can select benchmarks, that make their cores "look good".

And all (I think?) licensed MIPS processors include an MMU,

The Core vendors will pitch that a) the core is everything and b) Theirs is the best! (and remember, there are MANY cores from MIPS and ARM)

The reality is the core matters less and less, and Memory bandwidth, Power and peripherals will determine how your system works. Then there is pure availability. Try and buy a MIPS Flash based Microcontroller ?

There is more and more choice in the 32 bit MCU area: Soft CPUs, that are optimised for FPGAs, Freescale have a new V1 Coldfire, Atmel have a new AVR32 range (as well as ARM7 and ARM9), Zilog have Z16F, Infineon have the XC2200, and there are many vendors offering ARM uC.....

Few these days will care about assembler level code, so choose the best uC for the task you have.

Debug support, and tools, will start to matter in many design starts.

-jg

Reply to
Jim Granville

I should clarify that I don't actually have any product I want to produce at this point :-) I'm basically trying to learn more about processor architecture and how to prototype and tinker with these things.

So, I'm guessing ARM would look good in a benchmark with arrays and data structures that require a lot of addressing modes? While MIPS would look better in a benchmark with limited memory bandwidth, making the registers more valuable?

Good point. I know that there's a lot more to a successful device than just the core. The most complex hardware project I've done used an 8-bit AVR microcontroller... and it was a pleasure to use, since it had on-chip DAC, PWM, and GPIO, and in-system-programmable flash memory.

Coldfire looks not so exciting, since it's based on the CISC m68k, though I gather it's got a cleaned-up instruction set. The AVR32 looks really cool, like it is designed to be a do-everything architecture... good code density, DSP capabilities, SIMD capabilities, MMU, Java, wow. It looks like Atmel is aiming to really shake up the 32-bit embedded market.

Yeah, the thing that's appealing about MIPS and ARM to me is that they are extremely well-supported by Linux and the GCC toolchain. Also, MIPS is even cooler cause there are free Verilog implementations to play around with!

Dan

Reply to
Dan Lenski

Thanks! I skimmed a few chapters, some very interesting stuff. Although, my understanding is that stack-based computers have fallen out of favor due to the increasing disparity between CPU speed and memory bandwidth.

Are there any other books or articles that compare register-based architectures to one another?

Dan

Reply to
Dan Lenski
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Daniel Lenski wrote:

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For pure architecture curiosity look at the 16 bit Freescale xgate RISC This processor can achieve code density close to that of a CISC.

Walter Banks

Reply to
Walter Banks

For the latest stuff, but radically different, see:

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My bookshelf had a clear-out a few months ago, and I've forgotten the titles and authors!

Otherwise, the most fascinating is "Interpretation and Instruction Path Coprocessing", Debaere and Campenhout, MIT Press, 1989 (probably out of print), ISBN 0-262-04107-3. This includes an excellent analysis of CPU/memory bandwidth issues. The only downside of this book is that code generation technology for stack machines has moved on a great deal since then, but the parts about the hardware are still valid.

Anyone fighting secondary instruction set patents, e.g. Thumb-1 and MIPS16, should also read this book! :-}

Stephen

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Reply to
Stephen Pelc

Thanks for all the suggestions! For anyone else interested, I've found an excellent 2005 book comparing RISC architectures:

Dandamudi, S. P. "Guide to RISC Processors." Springer 2005. 387 pages.

It has an overview of RISC, then separate chapters on MIPS, SPARC, PowerPC, Itanium, and ARM, and then a lengthy section on MIPS programming and architecture.

Dan

Reply to
Dan Lenski

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