ixf440's MDC/MDIO communiction while packets are transceived.

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Hi.

I'm woring with an Intel IXP1240(Network Processor), IXF440(8 port
MAC), and two LXT9763(PHY). I met a problem : While data packets are
being transceived, if I try MDC/MDIO serial communiction of IXF440 to
LXT9763, tx-error counter of IXF440 is increased. I don't understand
why MDC/MDIO communication interferes with data communication. Any
experiece and information are welcome.

Thanks for any ideas.

Re: ixf440's MDC/MDIO communiction while packets are transceived.
Hi Winam,

We used the IXF440 in our last project so I'm a little bit familiar with
it. If You take a look at side 21 of the manual (revision 004) at the
point 3.1.1 You will find:

"The configuration and the serial registers are writable only when the
port is in stop state (as
reported in the interrupt status register INT_STT), following transmit
and receive disable
programming."

Maybe this is your problem.


Regards
Michael


Winam wrote:
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Re: ixf440's MDC/MDIO communiction while packets are transceived.
Quoted text here. Click to load it

Could be right, although I'm not sure the term "serial registers" applies to
the Serial Command Register. The datasheet lists "Serial Registers" but the
SerCom is listed in "Base registers", so I think the datasheet writer was using
the term "serial registers" to mean only those listed under "Serial Registers".

The original poster may want to look and see which specific TX Error flags are
being set (the txerr flag is an OR of the TX error bits). That might give a
clue as to what is going on.

I'm thinking it could be one of the two eternal villians: software or hardware.
 :-)

Software: Check the code that reads/writes to the SerCom register and make sure
it's not accidently messing around with any of the other bits.

Hardware: Follow the MDC and MDIO lines and see what they run next to. It could
be that they are shorting to an adjacent signal or causing noise.


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