How do ADCs tackle negative value analog input ?

Depends on the specific ADC. If it has an input range from +2.5v to -2.5v then it will work fine. If not you will have to scale your signal and possibly add an appropriate offset.

it will work fine. If not you will have to scale your signal and possibly add an appropriate offset.

Or else run it off +-2.5 and level-shift the digital side. That can be a win e.g. with SPI, where you only need three or four wires, compared to level-shifting a whole bunch of analogue inputs.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs 
Principal Consultant 
ElectroOptical Innovations LLC 
Optics, Electro-optics, Photonics, Analog Electronics 

160 North State Road #203 
Briarcliff Manor NY 10510 

hobbs at electrooptical dot net 
http://electrooptical.net

On Wed, 9 Jan 2013 20:25:17 -0800 (PST), snipped-for-privacy@gmail.com wrote:

--- View with a fixed-pitch font:

+10 | +--|-[10K]-+ +-[10K]-+ | | | | | ACIN>---[10k]--+-|-\U1A | | | | >-----+-[10K]-+-|-\U1B| +--|+/ | >--+-->OUT | | +10--[76.8K]--+-|+/ GND | | -10 [11.0K] | | GND

Here's the LTspice circuit list just in case you want to run a simulation:

Version 4 SHEET 1 880 680 WIRE 16 -96 -16 -96 WIRE 112 -96 96 -96 WIRE -144 16 -176 16 WIRE -16 16 -16 -96 WIRE -16 16 -64 16 WIRE 16 16 -16 16 WIRE 112 32 112 -96 WIRE 112 32 80 32 WIRE 144 32 112 32 WIRE 256 32 224 32 WIRE 288 32 256 32 WIRE 384 32 368 32 WIRE 16 48 -16 48 WIRE 256 128 256 32 WIRE 288 128 256 128 WIRE 384 144 384 32 WIRE 384 144 352 144 WIRE 144 160 112 160 WIRE 256 160 224 160 WIRE 288 160 256 160 WIRE -368 240 -368 176 WIRE -272 240 -272 176 WIRE -176 240 -176 16 WIRE 256 256 256 160 WIRE -368 368 -368 320 WIRE -272 368 -272 320 WIRE -272 368 -368 368 WIRE -176 368 -176 320 WIRE -176 368 -272 368 WIRE -16 368 -16 48 WIRE -16 368 -176 368 WIRE 256 368 256 336 WIRE 256 368 -16 368 WIRE -368 432 -368 368 FLAG 48 0 +10 FLAG 320 112 +10 FLAG 320 176 -10 FLAG 48 64 -10 FLAG -368 432 0 FLAG -368 176 +10 FLAG -272 176 -10 FLAG 112 160 +10 SYMBOL res 240 16 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R3 SYMATTR Value 10k SYMBOL voltage -176 224 R0 WINDOW 3 24 96 Invisible 2 WINDOW 123 0 0 Left 2 WINDOW 39 0 0 Left 2 SYMATTR InstName V2 SYMATTR Value SINE(0 2.5 1000) SYMBOL res 240 144 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R1 SYMATTR Value 76.8K SYMBOL res 384 16 R90 WINDOW 0 -33 56 VBottom 2 WINDOW 3 -32 56 VTop 2 SYMATTR InstName R2 SYMATTR Value 10k SYMBOL res 272 352 R180 WINDOW 0 43 77 Left 2 WINDOW 3 38 49 Left 2 SYMATTR InstName R5 SYMATTR Value 11K SYMBOL Opamps\\LT1001 320 80 R0 SYMATTR InstName U3 SYMBOL voltage -272 224 R0 WINDOW 123 0 0 Left 2 WINDOW 39 0 0 Left 2 SYMATTR InstName V3 SYMATTR Value -10 SYMBOL voltage -368 224 R0 WINDOW 3 16 102 Left 2 WINDOW 123 0 0 Left 2 WINDOW 39 0 0 Left 2 SYMATTR InstName V4 SYMATTR Value 10 SYMBOL Opamps\\LT1001 48 -32 R0 SYMATTR InstName U1 SYMBOL res -48 0 R90 WINDOW 0 -33 56 VBottom 2 WINDOW 3 -32 56 VTop 2 SYMATTR InstName R4 SYMATTR Value 10k SYMBOL res 112 -112 R90 WINDOW 0 -33 56 VBottom 2 WINDOW 3 -32 56 VTop 2 SYMATTR InstName R6 SYMATTR Value 10k TEXT -210 424 Left 2 !.tran .01 TEXT 168 216 Left 2 ;1% TEXT 200 328 Left 2 ;1%

-- JF

Whether a particular ADC chip can handle negative voltages is not a functio n of the method it uses internally to do the conversion: it is a function o f the voltage range of the chip itself. There are a number of SAR and flas h ADCs that are designed to work with inputs that swing below digital groun d, and there are a number of sigma-delta ADCs (mostly the ones that come at tached to microprocessors and less expensive audio ones) with inputs that a re constrained to not go below 0V.

Look at data sheets. If you get onto the websites of the major semiconduct or companies (TI and Analog Devices spring to mind) you should find selecti on guides that list, among other things, the chips' input voltage ranges.

--

Tim Wescott 
Circuits, Systems, Software 
www.wescottdesign.com

Sure. Simple.

In the case of the SAR, you simply need a bipolar DAC with the appropriate encoding in the feedback of the comparator. The sign bit is the MSB (tested first).

A flash ADC would simply have the resistor chain between +2.5V and

-2.5V, with the comparators tapped off it. The output will be a "thermometer code" but it's not a huge deal to convert that to whatever code you want (same problem as unipolar, really).

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All just balderdash unless you can produce a schematic.

Good Lord, you're an asshole, Fields.

Yes, really. Any second-year student would have studied this sort of thing.

A CPLD, if I had an idiot boss who asked for such a dumb thing. IT's a simple matter of logic. Maybe more than one would want to hand wire with 555s (all you know how to use), but simple nonetheless. The trivial solution is 250ish 2in muxes; a trivial CPLD or FPGA exercise. Kinda a dumb problem though. Not surprising coming from you.

First thing is to specify the problem. "audio signal" is way to vague. If you really mean "audio signal" couple it with a capacitor sufficient to pass the lowest frequencies and be done with it.

Even if you did build some kind of DC level shifter, you still have the problem of deciding where zero is.

The solution is easier if you know what you're solving.

--
The OP asked for help, instead of just fluff, so I guess, as usual, 
that you won't be posting anything substantive.

--
Which he did, and rather well.

Well, we now know what YOU mean by audio. That may or may not be what the OP means by audio. I've seen many an engineer lead himself astray with the words "generally regarded". Why not just ASK for actual data?

Well, I'd start with a cap and two resistors. But that's just me.

Unless you're the OP, YOUR edification is not what's required here.

Last thing we need is to jump to conclusion and apply tunnel vision. If your problem definition is correct, your solution is overkill.

John Fields schrieb:

Hello,

audio may be the range from 300 Hz to 3,4 kHz, or from 20 Hz to 16 kHz, or 10 Hz to 20 kHz. It depends on telephone voice only or music and the desired quality.

Bye

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Because, at this point in the discussion, the OP's implication makes 
the actual data unimportant.

Probably Mike means a high-pass, with a resistive divider to set the mid-point. R1 +Vref to Ain, R2 Ain to -Vref (which may well be Agnd) and C1 fron signal to Ain. R1 = R2 with C1 and R1//R2 setting the LF rolloff. Don't forget the ADC input impedance if it's unbuffered.

Cheers

--
Syd

Did you just say that the question is unimportant because you have the answer? I know a number of product development teams that would be delighted to hire that talent.

You post a lot here. My conclusion is that you're a smart guy and this is just an exercise in being contrary. You're going way out of your way to be dense.

There aren't many ways to hook three components together to level-shift an AC signal. You could have tried them all in less time than it took you to bitch at me.

The more you know about the requirements, the better chance you have to create an optimal solution. Being a hammer can be good...unless you mistake a finger nail for a carpentry nail.

Ability to run a sim has value. Knowing what to sim...priceless.

I answered the question, moron. All of this stuff is on the web if you know how to look for it. I gave a *lot* more information than you have. A level shifter (LOL). A typical Fields hack.

You were the one who put parameters on the project that made it a dumb solution. He asked if it could be done. Certainly it can. Question asked and answered.

But that wasn't the question asked, dumbshit.

Is the one trick pony getting sensitive to the truth?

A *really* dumb solution that no one doing this stuff professionally would have dared offer.

You really are proud of your Fields' hairballs, aren't you?

Because it's *much* easier to do a web search, given the right keywords. It took me less than 30 seconds. Here, I know you're a hacker, so maybe you can learn something (doubtful).

--
Of course not, and you're foolishly trying to put the cart before the 
horse. 

What you missed was that the OP's query was detailed enough to allow a 
design to be executed which would fulfill his criteria - as evidenced 
by one of my earlier posts - but you couldn't cut it and had to mouth 
off with that nonsensical filter blather.

all,

go.

from

could

tackle

so that the last two ADCs can handle it ?

If your source impedance is very low (such as the output of an op-amp), it is fairly easy to shift the level with two equal value precision resistors, one of which goes to the Vref. For instance, I'm using a 5V PIC with a

2.5 VDC reference, so when the signal is zero, the ADC sees 2.5/2 = 1.25V. At the extremes of +/- 2.5V, the ADC sees 2.5V to 0V. Just make sure the resistors present an impedance low enough for the ADC sampling to acquire a solid reading. A small capacitor helps. I use two 3.01k resistors and a 10 nF capacitor which is good for most audio signals (I'm reading 60 Hz).

It is easy to convert the resulting 10 bit unsigned digital result to a signed result by subtracting 512 counts. I use this for an instrument that calibrates to at least 0.25% which is about the limit of a 10 bit signed

integer value.

Paul

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True, but your answer was nonsensical.