I wanted to refresh my old design of the digital wireless system:
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To increase range and bandwidth, I wanted to use a WiFi module (e.g. something from
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). However after short comparison of prises and power consumption, I have foun d, that Raspberry Pi model A equipped with USB WiFi card may be a very good al ternative for microcontroller based solution. So I have decided to connect CS5343 or CS5344 ADC
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/products/cs5343-44.html ) to the port P5 in Raspberry Pi, connect some add itional buttons and potentiometers (via I2C equipped ADC) to the GPIO and b uild a jack (
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) compatible wireless guitar sys tem.
There is however one question which I need to answer - to allow CS5343/4 AD C to sample sound at 48MHz, I need to provide it with the master clock with frequency of 12.288MHz, 18.432MHz,24.576 MHz or 36.864MHz ( see
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, page 14, table 5).
Of course I can generate this clock with a separate generator, but I think it would more elegant to generate it inside the Raspberry Pi.
I know about possibility to generate such clock with the GPIO MASH dividers (
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rals.pdf , section 6.3 General Purpose GPIO Clocks ), but I'm afraid that j itter may significantly impair sound quality.
Is there any better way to generate one of the above mentioned frequencies in another way, without so significant jitter?
I can see, that another problem associated with my project, is lack of I2S support in the standard Raspberry Pi kernel - 3.6.11
There is an RPi compatible I2S driver published by Florian Meier in
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but it is based on 3.8.xx kernels. I've tried to integrate it with my Buildroot based environment for Raspberry Pi (I prefer to use Buildroot generated, initramfs based system, instead of Raspbian to avoid fast wear of the SD card):
I downloaded the current Buildroot: wget wget
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I unpacked it: tar -xf buildroot-2013.08.1.tar.gz
I performed the default configuration for Raspberry Pi: cd buildroot-2013.08.1; make defconfig rpi_defconfig
In the `make menuconfig` I have set "URL of custom Git repository" to git://github.com/koalo/linux.git and "Custom Git version" to "rpi-3.8.yasocdev"
After that, I was able to start `make linux-menuconfig` and select "Device Drivers -> Sound card support -> Advanced Linux Sound Architecture -> ALSA for SoC audio support -> SoC Audio support for the Broadcom BCM2708 I2S module" (as described in
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) I've saved the resulting kernel configuration to the directory in which I've unpacked the buildroot as rpi_kernel_config, and I have made the following changes to "make menuconfig"
Set the "Kernel configuration" to "Using a custom config file"
Set the "Configuration file path" to "../rpi_kernel_config"
I have also set "Port to run a getty (login prompt) on " in "System configuration" to "ttyAMA0"
In the "Filesystem images" I have selected: [*] initial RAM filesystem linked into linux kernel and Compression method (lzma)
Then I have compiled the system with "make -j 8"
Finally I've modified the default Buildroot cmdline.txt from "dwc_otg.fiq_fix_enable=1 sdhci-bcm2708.sync_after_dma=0 dwc_otg.lpm_enable=0 console=tty1 root=/dev/mmcblk0p2 rootwait" to "dwc_otg.fiq_fix_enable=1 sdhci-bcm2708.sync_after_dma=0 dwc_otg.lpm_enable=0 console=ttyAMA0 root=/dev/mmcblk0p2 rootwait"
(in fact the "root=" and "rootwait" arguments do not make sense, as the whole system starts and runs from initramfs, but it doesn't hurt).
After that the only problem to be solved is generation of the master clock, and preparation of the codec driver for CS5343/CS5344.
Today I have got recording working as well. It appears that codec is used i n the slave mode. Therefore LRCIN must be connected as well. So the correct connection diagram is:
However the "scheduling while atomic" problem appears also during recording : # arecord -D hw:1,0 -f dat /tmp/test1.wav [ 1179.013561] bcm2708-dmaengine bcm2708-dmaengine: allocating channel for
0 Recording WAVE '/tmp/test1.wav' : Signed 16 bit Little Endian, Rat[ 1179.02
6691] BUG: scheduling while atomic: arecord/823/0x00000003 e 48000 Hz, Ster[ 1179.033575] Modules linked in:eo snd_soc_rpi_mbed snd_soc_tlv320aic23 bcm2708_dmaengine virt_dma snd_soc_bc m2708_i2s snd_soc_bcm2708 snd_soc_core regmap_spi regmap_i2c snd_compress i
2c_bcm2708 8192cu snd_bcm2835 snd_pcm snd_timer snd snd_page_alloc [ 1179.057351] [] (unwind_backtrace+0x0/0xf0) from [] ( __schedule_bug+0x44/0x58) [ 1179.066272] [] (__schedule_bug+0x44/0x58) from [] (_ _schedule+0x4d0/0x57c) [ 1179.074926] [] (__schedule+0x4d0/0x57c) from [] (sch edule_timeout+0x170/0x200) [ 1179.083923] [] (schedule_timeout+0x170/0x200) from [ ] (wait_for_common+0xcc/0x198) [ 1179.093266] [] (wait_for_common+0xcc/0x198) from [] (flush_work+0xe4/0x188) [ 1179.102008] [] (flush_work+0xe4/0x188) from [] (sche dule_on_each_cpu+0x48/0x60) [ 1179.111091] [] (schedule_on_each_cpu+0x48/0x60) from [] (migrate_prep+0x8/0x10) [ 1179.120179] [] (migrate_prep+0x8/0x10) from [] (allo c_contig_range+0xd8/0x2d0) [ 1179.129190] [] (alloc_contig_range+0xd8/0x2d0) from [] (dma_alloc_from_contiguous+0x6c/0x10c) [ 1179.139520] [] (dma_alloc_from_contiguous+0x6c/0x10c) from [] (__alloc_from_contiguous+0x28/0x74) [ 1179.150319] [] (__alloc_from_contiguous+0x28/0x74) from [] (__dma_alloc.isra.20+0x150/0x2c0) [ 1179.160550] [] (__dma_alloc.isra.20+0x150/0x2c0) from [] (arm_dma_alloc+0x90/0x98) [ 1179.169902] [] (arm_dma_alloc+0x90/0x98) from [] (bc m2708_dma_prep_dma_cyclic+0xf0/0x1b4 [bcm2708_dmaengine]) [ 1179.181628] [] (bcm2708_dma_prep_dma_cyclic+0xf0/0x1b4 [bcm270
8_dmaengine]) from [] (snd_dmaengine_pcm_trigger+0xd4/0x148 [snd_ soc_core]) [ 1179.195764] [] (snd_dmaengine_pcm_trigger+0xd4/0x148 [snd_soc_ core]) from [] (soc_pcm_trigger+0x64/0x144 [snd_soc_core]) [ 1179.208447] [] (soc_pcm_trigger+0x64/0x144 [snd_soc_core]) fro m [] (snd_pcm_do_start+0x2c/0x30 [snd_pcm]) [ 1179.219807] [] (snd_pcm_do_start+0x2c/0x30 [snd_pcm]) from [] (snd_pcm_hw_refine+0x908/0x9bc [snd_pcm]) [ 1179.230994] [] (snd_pcm_hw_refine+0x908/0x9bc [snd_pcm]) from [] (snd_pcm_update_hw_ptr+0x2f4/0x3ac [snd_pcm]) [ 1179.242787] [] (snd_pcm_update_hw_ptr+0x2f4/0x3ac [snd_pcm]) f rom [] (snd_pcm_lib_read+0x48/0x40c [snd_pcm]) [ 1179.254529] [] (snd_pcm_lib_read+0x48/0x40c [snd_pcm]) from [< bf021bcc>] (snd_pcm_status+0x1390/0x1668 [snd_pcm]) [ 1179.265734] [] (snd_pcm_status+0x1390/0x1668 [snd_pcm]) from [ ] (do_vfs_ioctl+0x80/0x5d0) [ 1179.275692] [] (do_vfs_ioctl+0x80/0x5d0) from [] (sy s_ioctl+0x38/0x64) [ 1179.284000] [] (sys_ioctl+0x38/0x64) from [] (ret_fa st_syscall+0x0/0x30) [ 1179.297717] BUG: scheduling while atomic: arecord/823/0x40000003 [ 1179.303861] Modules linked in: snd_soc_rpi_mbed snd_soc_tlv320aic23 bcm2
708_dmaengine virt_dma snd_soc_bcm2708_i2s snd_soc_bcm2708 snd_soc_core reg map_spi regmap_i2c snd_compress i2c_bcm2708 8192cu snd_bcm2835 snd_pcm snd_ timer snd snd_page_alloc [ 1179.325847] [] (unwind_backtrace+0x0/0xf0) from [] ( __schedule_bug+0x44/0x58) [ 1179.334761] [] (__schedule_bug+0x44/0x58) from [] (_ _schedule+0x4d0/0x57c) [ 1179.343410] [] (__schedule+0x4d0/0x57c) from [] (__c ond_resched+0x24/0x34) [ 1179.352192] [] (__cond_resched+0x24/0x34) from [] (_ cond_resched+0x3c/0x44) [ 1179.360960] [] (_cond_resched+0x3c/0x44) from [] (sh rink_page_list+0x48/0x928) [ 1179.369965] [] (shrink_page_list+0x48/0x928) from [] (reclaim_clean_pages_from_list+0x110/0x178) [ 1179.380521] [] (reclaim_clean_pages_from_list+0x110/0x178) fro m [] (alloc_contig_range+0x10c/0x2d0) [ 1179.391360] [] (alloc_contig_range+0x10c/0x2d0) from [] (dma_alloc_from_contiguous+0x6c/0x10c) [ 1179.401756] [] (dma_alloc_from_contiguous+0x6c/0x10c) from [] (__alloc_from_contiguous+0x28/0x74) [ 1179.412401] [] (__alloc_from_contiguous+0x28/0x74) from [] (__dma_alloc.isra.20+0x150/0x2c0) [ 1179.422606] [] (__dma_alloc.isra.20+0x150/0x2c0) from [] (arm_dma_alloc+0x90/0x98) [ 1179.431952] [] (arm_dma_alloc+0x90/0x98) from [] (bc m2708_dma_prep_dma_cyclic+0xf0/0x1b4 [bcm2708_dmaengine]) [ 1179.443677] [] (bcm2708_dma_prep_dma_cyclic+0xf0/0x1b4 [bcm270
8_dmaengine]) from [] (snd_dmaengine_pcm_trigger+0xd4/0x148 [snd_ soc_core]) [ 1179.457934] [] (snd_dmaengine_pcm_trigger+0xd4/0x148 [snd_soc_ core]) from [] (soc_pcm_trigger+0x64/0x144 [snd_soc_core]) [ 1179.470635] [] (soc_pcm_trigger+0x64/0x144 [snd_soc_core]) fro m [] (snd_pcm_do_start+0x2c/0x30 [snd_pcm]) [ 1179.481997] [] (snd_pcm_do_start+0x2c/0x30 [snd_pcm]) from [] (snd_pcm_hw_refine+0x908/0x9bc [snd_pcm]) [ 1179.493183] [] (snd_pcm_hw_refine+0x908/0x9bc [snd_pcm]) from [] (snd_pcm_update_hw_ptr+0x2f4/0x3ac [snd_pcm]) [ 1179.504973] [] (snd_pcm_update_hw_ptr+0x2f4/0x3ac [snd_pcm]) f rom [] (snd_pcm_lib_read+0x48/0x40c [snd_pcm]) [ 1179.516585] [] (snd_pcm_lib_read+0x48/0x40c [snd_pcm]) from [< bf021bcc>] (snd_pcm_status+0x1390/0x1668 [snd_pcm]) [ 1179.527770] [] (snd_pcm_status+0x1390/0x1668 [snd_pcm]) from [ ] (do_vfs_ioctl+0x80/0x5d0) [ 1179.537721] [] (do_vfs_ioctl+0x80/0x5d0) from [] (sy s_ioctl+0x38/0x64) [ 1179.546028] [] (sys_ioctl+0x38/0x64) from [] (ret_fa st_syscall+0x0/0x30) [ 1179.554776] BUG: scheduling while atomic: arecord/823/0x00000003 [ 1179.560862] Modules linked in: snd_soc_rpi_mbed snd_soc_tlv320aic23 bcm2
708_dmaengine virt_dma snd_soc_bcm2708_i2s snd_soc_bcm2708 snd_soc_core reg map_spi regmap_i2c snd_compress i2c_bcm2708 8192cu snd_bcm2835 snd_pcm snd_ timer snd snd_page_alloc [ 1179.582842] [] (unwind_backtrace+0x0/0xf0) from [] ( __schedule_bug+0x44/0x58) [ 1179.591756] [] (__schedule_bug+0x44/0x58) from [] (_ _schedule+0x4d0/0x57c) [ 1179.600407] [] (__schedule+0x4d0/0x57c) from [] (sch edule_timeout+0x170/0x200) [ 1179.609411] [] (schedule_timeout+0x170/0x200) from [ ] (wait_for_common+0xcc/0x198) [ 1179.618752] [] (wait_for_common+0xcc/0x198) from [] (flush_work+0xe4/0x188) [ 1179.627455] [] (flush_work+0xe4/0x188) from [] (sche dule_on_each_cpu+0x48/0x60) [ 1179.636543] [] (schedule_on_each_cpu+0x48/0x60) from [] (alloc_contig_range+0x1f0/0x2d0) [ 1179.646427] [] (alloc_contig_range+0x1f0/0x2d0) from [] (dma_alloc_from_contiguous+0x6c/0x10c) [ 1179.656951] [] (dma_alloc_from_contiguous+0x6c/0x10c) from [] (__alloc_from_contiguous+0x28/0x74) [ 1179.667615] [] (__alloc_from_contiguous+0x28/0x74) from [] (__dma_alloc.isra.20+0x150/0x2c0) [ 1179.677825] [] (__dma_alloc.isra.20+0x150/0x2c0) from [] (arm_dma_alloc+0x90/0x98) [ 1179.687173] [] (arm_dma_alloc+0x90/0x98) from [] (bc m2708_dma_prep_dma_cyclic+0xf0/0x1b4 [bcm2708_dmaengine]) [ 1179.698894] [] (bcm2708_dma_prep_dma_cyclic+0xf0/0x1b4 [bcm270
8_dmaengine]) from [] (snd_dmaengine_pcm_trigger+0xd4/0x148 [snd_ soc_core]) [ 1179.713029] [] (snd_dmaengine_pcm_trigger+0xd4/0x148 [snd_soc_ core]) from [] (soc_pcm_trigger+0x64/0x144 [snd_soc_core]) [ 1179.725703] [] (soc_pcm_trigger+0x64/0x144 [snd_soc_core]) fro m [] (snd_pcm_do_start+0x2c/0x30 [snd_pcm]) [ 1179.737064] [] (snd_pcm_do_start+0x2c/0x30 [snd_pcm]) from [] (snd_pcm_hw_refine+0x908/0x9bc [snd_pcm]) [ 1179.748254] [] (snd_pcm_hw_refine+0x908/0x9bc [snd_pcm]) from [] (snd_pcm_update_hw_ptr+0x2f4/0x3ac [snd_pcm]) [ 1179.760168] [] (snd_pcm_update_hw_ptr+0x2f4/0x3ac [snd_pcm]) f rom [] (snd_pcm_lib_read+0x48/0x40c [snd_pcm]) [ 1179.771802] [] (snd_pcm_lib_read+0x48/0x40c [snd_pcm]) from [< bf021bcc>] (snd_pcm_status+0x1390/0x1668 [snd_pcm]) [ 1179.782992] [] (snd_pcm_status+0x1390/0x1668 [snd_pcm]) from [ ] (do_vfs_ioctl+0x80/0x5d0) [ 1179.792946] [] (do_vfs_ioctl+0x80/0x5d0) from [] (sy s_ioctl+0x38/0x64) [ 1179.801253] [] (sys_ioctl+0x38/0x64) from [] (ret_fa st_syscall+0x0/0x30) Aborted by signal Interr[ 1189.701148] bcm2708-dmaengine bcm2708-dmaengi ne: freeing channel for 0 upt... #
Drivers assume, that the ADC works with MCLK connected to independent 18,432 MHz clock, in Master Single Speed Mode, with clock ratio: 192x/384x/768x MCLK/LRCK (see
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page 14 for details). So SDOUT must be pulled up to VCC to select the Master Mode, LRCK must be left without external pullup or pulldown resistor to select Single Speed Mode, and SCLK must be pulled up to select clock ratio: 192x/384x/768x MCLK/LRCK.
Described setup handles only 2 channel recording with 48000Hz sampling frequency. I have successfully recorded sound with: arecord -D hw:1,1 -f S32_LE -c 2 -r 48000 /tmp/test1.wav (for CS5344) and arecord -D hw:1,0 -f S32_LE -c 2 -r 48000 /tmp/test2.wav (for CS5343)
The kernel git tree with my additions is available at
Hi, The CS5343/CS5344 support has been included by Florian Meier to his repository: git://github.com/koalo/linux.git , version rpi-3.8.yasocdev , which AFAIK is the main point of work on I2S support for Raspberry Pi.
To allow transmission of audio from the guitar to the computer running virtual amplifier, I have added jack2 package to the buildroot.
The package definition is as follows: package/jack2/Config.in : config BR2_PACKAGE_JACK2 bool "jack2" select BR2_PACKAGE_LIBSAMPLERATE select BR2_PACKAGE_LIBSNDFILE help jack2 - low latency audio server
Jack2 compiles successfully, but when I start it, I get the following error:
# jackd -P41 -p512 -t10000 -dalsa -r48000 -p256 -n2 -Xseq -Chw:1,0 jackdmp 1.9.9.5 Copyright 2001-2005 Paul Davis and others. Copyright 2004-2012 Grame. jackdmp comes with ABSOLUTELY NO WARRANTY This is free software, and you are welcome to redistribute it under certain conditions; see the file COPYING for details JACK server starting in realtime mode with priority 41 [ 476.424857] Alignment trap: not handling instruction e1926f9f at [] [ 476.432702] Unhandled fault: alignment exception (0x011) at 0xb563008e Bus error
When I start jack for output via standard bcm2835 alsa driver, I get similar problem: Bus error # jackd -P41 -p512 -t10000 -dalsa -r48000 -p256 -n2 -Xseq -Phw:0,0 jackdmp 1.9.9.5 Copyright 2001-2005 Paul Davis and others. Copyright 2004-2012 Grame. jackdmp comes with ABSOLUTELY NO WARRANTY This is free software, and you are welcome to redistribute it under certain conditions; see the file COPYING for details JACK server starting in realtime mode with priority 41 [ 509.241315] Alignment trap: not handling instruction e1926f9f at [] [ 509.248457] Unhandled fault: alignment exception (0x011) at 0xb565f08e Bus error #
So it seems, that problem is related to jack, not to my driver :-(.
W dniu czwartek, 24 pa?dziernika 2013 22:32:48 UTC+2 u?ytkownik w zab napisa?:
rtual amplifier, I have added jack2 package to the buildroot.
#######
#######
or:
lar problem:
According to
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the problem was known for jack on ARM CPUs.
I had to switch to git version of jack2. I've done it by modification of th e package/jack2/jack2.mk : ########################################################################### ##### # # jack2 # ########################################################################### #####
It seems, that I have found the problem with "scheduling while atomic bug"
In the function bcm2708_dma_prep_dma_cyclic memory allocations are done with the GFP_ATOMIC flag or with GFP_KERNEL flag, which may cause the "scheduling while atomic" problem:
I don't know if the control_block_size is too big to be allocated with the GFP_ATOMIC flag, or maybe the dma_alloc_coherent on Raspberry Pi doesn't ac cept this flag?
Does it make sense to change the allocation mode to GFP_ATOMIC there?
Anyway this is the most likely cause of the problem. Unfortunately currentl y I can't verify it on a real hardware :-(.
Regards, Wojtek
W dniu wtorek, 22 pa?dziernika 2013 20:05:19 UTC+2 u?ytkownik wza b napisa?:
in the slave mode. Therefore LRCIN must be connected as well.
ng:
r 0
026691] BUG: scheduling while atomic: arecord/823/0x00000003
The problem with "scheduling while atomic" has disappeared in a new version of kernel (rpi-3.12.y, probably also in rpi-3.10.y on
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aspberrypi/linux/ ) The version with added CS5343/CS5344 ADC is available at
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/wzab/linux-rpi-wzab , branch rpi-3.12.y. I'm sorry but due to github limitations (and probably due to my ignorance ;
-) ), I had to remove the
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repositor y to create the new one (there is no way to have two different repositories which are (even indirectly) forked from the same repository).
I have also successfully tested the board
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The atmega88p may be programmed with the avrdude (packaged for buildroot: h ttp://patchwork.ozlabs.org/patch/305060/ ). The first version of firmware allows to read pins and ADC via I2C. I hope t o add it soon to the above repository.
So now the only unsolved problem is the transmission of sound and controls settings from Raspberry Pi to the remote PC (Digital Audio Workstation, run ning, jack, guitarix, ardour and whatever is needed). My first trials with running jack + "jack over net" resulted in unacceptabl y high latency. My original system
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ndex.html) used radio link with proprietary protocol, the composite USB Aud io+USB MIDI device and "alsa_in", which gave reasonable latency. What I'm considering now is a similar solution with alsa client running wit h real time scheduling policy and transferring the data as soon as possible via a low latency network protocol to the alsa_in based program on remote PC. It would be good if this protocol could combine both audio and controls set ting using virtual channels with different priorities.
This thread started to be a kind of blog, which obviously not a purpose of the discussion group, so I definitely move all progress reports and questio ns to
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However I'll watch this thread ans respond to all questions and comments fr om others.
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