Chip to Sequentially Read Many Inputs ?

There's a common 4000-series chip (4060?) that's a parallel-to-serial converter. Basically, you can connect your parallel inputs into one of the

8 input lines, latch the input and simply clock the data through on a synchronous serial line. There's a complementary chip that does outputs. You can chain as many of these as you like together. The only real problem is that the more inputs/outputs you have, the longer a single operation will take.

Geoff

B1ackwater wrote:

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You can use eight 74HC165 pallel-in/serial-out shift registers. You can control it with just three pins, if you like.

Noel

A 64:1 multiplexer will likely take a few chips to implement, probably from 8:1 muxes and a bit of glue logic.

It takes 6 bits to address 64 inputs (ln(64)/ln(2) if you must)-- so a 6 bit counter will do you. You could use a 74HC4040 ripple counter (12 bits) which would address 4096 inputs. That will require only 3 port pins, perhaps less if you use other tricks, but probably at least 10 chips.

Another, perhaps more attractive, approach could be to use a parallel-in, serial out 64-bit shift register (say made from 8 chips eg. 74HC165). You would use one port pin for the data, one for the clock, and one for the load signal. This has the advantage of sampling every input virtually simultaneously, requires no glue logic, and still only requires 3 port pins. Instead of bit-banging the clock and data signals, you may be able to use available SPI bus hardware to read the inputs at relatively high speed.

Best regards, Spehro Pefhany

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Hello,

The other way to do it would be to code another pic chip specifically meeting these requirements. ;-)

I wonder if you mean a multiplexor, not sure here. I know what you're trying to achieve though. The trouble is that there's no robustness built into the circuit in the event of a misread if purely clocking a pin and dumping the contents of your output. Parallel wise it would take 6 bits to represent 64 (or 63 for those that refuse to accept 0 as a state). Tricky one.

Currently wading through this site for my own purposes atm;

Good luck :-)

Aly

Depending on volume, you could just program another cheap 40 pin uC to handle the bulk of them. Its wasteful but easy :)

Al

Probably easiest to whip one together out of a small CPLD and a bit of HDL code. Something like an SPI interface where the uC sends a read request (where 3 of the 8 bits constitute an "address") and the CPLD replies with the values on the 8 input pins at that address. Very little overhead if the uC has a built-in SPI port and fairly straightforward on the CPLD side. Also give you random vice sequential access.

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Sure, use a couple of those $1.47 LPC ARMs as peripherals for your PIC. ;-)

Best regards, Spehro Pefhany

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Sounds like a shift register (parallel load serial output), mind you are you wanting to clock load all 64 bits at once, before shifting?

Another alternative SPI or I2C chips or PLD providing the 40 pin I/O but serial to micro.

On I2C you can get chips like PCF8574(A) or PCF8575 that are 8bit and

16bit I2C I/O chips and only needs bit banging on two micro pins, and read bytes at a time.

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What you are looking for are called IO Expanders, or ShiftRegisters. See

Which one is best depends on price, component count, if the IO are distributed, noise immunity etc.

Simple Logic Shift registers will be the lowest cost, but they need external pullups. They are also very easy to cascade and expand.

PCF8574 series i2c IO expanders are convenient, but quite expensive.

The HEF4021 can read 8 ips, and drive 3 ops, so you can matrix 24 buttons on one of those. They are under 20c.

CPLD/SPLD can be used, but are more complex to deploy, so are best used if there is something special about the IO that means std shift registers will not be suitable.

-jg

have a look at:

something I did with shift registers years ago, but it gives you the schematic and code examples, if you want to try shift registers.

Don...

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if it's an output it'd be a decade counter, one pin to advance the high signal, one pin to reset it to it starting place, 10 outputs,

if you want to read try a parallel-in serial out shift register,

typically 8 inputs one output pin, one pin so signal the chip to read the inputs, and one pin to get the next input, the also have an input whare you can attach the output of another shift register... so they can be daisy-chained (plugged into the back of each other) so you could line up 8 of them and read the whole 64 inputs only three pins on your micro.

try 74HC165

if you can matrix your inputs you may be able to lower the chip count by using a decade counter to select rows and a single shift register to read columns - it'd use more i/o pins though

Bye. Jasen

neat, with the addition of a 3-bit address decoder you could matrix 64 buttons without using any more uC pins than are needed to drive the HEF4021

Bye. Jasen

snipped-for-privacy@baark.net (B1ackwater) wrote in news:434a62cb.6492746 @news.west.earthlink.net:

See what you can do with these circuits :

roma