Field-Programmable Gate Arrays

  1. Home
  2. Field-Programmable Gate Arrays
15255 Threads Posts
to

Worth reading in Field-Programmable Gate Arrays

Mapper using wrong EMAC with PowerPC in V4FX60

This is a V4FX60 design using one of the PowerPCs and one of the EMACs. The mapper uses the EMAC that has hard connecti...
1 comments posted 19yrs
posted by dcaulfield
1 comments posted 19yrs posted by dcaulfield

newbie needs help

Hello, I start playing with a Spartan 3 demo board. I want to program a 8 bits counter with one button that increments...
7 comments posted 19yrs
posted by olivier.scalbert
7 comments posted 19yrs posted by olivier.scalbert

Chipscope

I am using xilinx xup virtex2 pro Dev system board, and I am trying to communicate 2 boards together, using chipscope,...
1 comments posted 19yrs
posted by nmichou
1 comments posted 19yrs posted by nmichou

xilinx spi example under linux

Does anyone have any example code that uses the Xilinx SPI Linux driver? I just need to read a temperature sensor so so...
4 comments posted 19yrs
posted by cepope
4 comments posted 19yrs posted by cepope

PPC cache errata

Hi folks, I wonder how do you fight (bypass) problems with a PPC405 (Xilinx Virtex-4FX) caching problems - silicon erra...
10 comments posted 19yrs
posted by ales.gorkic
10 comments posted 19yrs posted by ales.gorkic

FPGA-CPU THROUG ETHERNET

Hi, I am trying to send messages from spartan 3e to pc via ethernet and viceversa. I have included opb_ethernet in the b...
1 comments posted 19yrs
posted by pbantunez
1 comments posted 19yrs posted by pbantunez

Wishbone I2C Application

Hi, My name is Loo, I am fresh for FPGA and Wishbone. Currently, I am using the Opencore I2C with Wishbone interface fo...
0 comments posted 19yrs
posted by camel_1213
0 comments posted 19yrs posted by camel_1213

EDK 8.2 bidir gpio in XBD (board definition)

I'm using WebPACK 8.2 and EDK 8.2, and created a board definition file (.xbd) for the Digilent Spartan-3 starter board...
1 comments posted 19yrs
posted by eric
1 comments posted 19yrs posted by eric

ISE Simulator radix question

The default radix on waveforms is decimal and although I can right click the waveforms and change the radix to hex, it...
6 comments posted 19yrs
posted by fred
6 comments posted 19yrs posted by fred

Strange JTAG TCK problems with Spartan XC3S400

Addressed to the XILINX insiders: I have made me myself a small pcb which is basically a replica of the simple Xilinx J...
1 comments posted 19yrs
posted by df6jb
1 comments posted 19yrs posted by df6jb

lead free bga pads

Hi all I'm having trouble finding pcb layout recomendations on the altera and xilinx web sites for lead free bga's. I'm...
7 comments posted 19yrs
posted by colin_toogood
7 comments posted 19yrs posted by colin_toogood

Bitstream programming

Hello I've started working on Xilinx Virtex II PRo FPGA kit for a project. Is there a way to configure bitstreams or ne...
1 comments posted 19yrs
posted by fyp.quadruples
1 comments posted 19yrs posted by fyp.quadruples