Yet Another Altera Online Support Is USELESS Rant...

Post the question here!!!

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Original Question:

Can't get SPI port working in design. Can you tell me if the SCLK should be oscilating all the time? It's not.

SDRAM, USB, UART, PIO, ASMI, TIMERs, DMAs all working in design but having trouble getting SPI going.

Can you have someone contact me that may help? Or at least answer my question about the clk and offer some advice?

Thanks, Ken Land snipped-for-privacy@Xneuralog.comX

I got SPI working with NIOS. sclk only oscillates when transferring data. Make sure you're using the right phase setting for the chip you're trying to talk to (you'll need to check the data sheet).

Derek

P.S. Yes, I'm not getting anything useful out of Altera web support either.

should be

either.

Thanks Derek,

After everything else went pretty easy, I was surprised not to see my SCLK even when writing to the device. Double checked my pin assignments, double checked my board wiring. Any ideas?

Some background: Nios 32 version 3.1 running at 100MHz in Cyclone SPI is setup as Master with one SS_n talking to a ST 8Mb serial flash. (M25P80. Similar chip to the 4 Mb ASMI config)

I've tried different clock speeds, (128 Khz - 15 MHz) with and without delay, but still no meaningful output on the SCLK. I see activity but nothing resembling a clock. Also tried clocking back the Nios to 60 MHz.

Is there any possible input or actions the P80 could take to cause the the SPI clock not to function?

What would/should be the effect of operating a SPI port on unused pins? Should it function or do I have to do something meaningful will the MISO input?

TIA, Ken

I could (easily) be wrong here, but I think SPI is one of several data transfer protocols that don't use many pins. They are great for low bandwidth setup sort of work. For example, talking to a tiny flash chip to store parametersm ir the control path on something like a CODEC to setup various parameters.

The "clock" does not normally run continiously. This type of interface is often run by big-banging from software using GPIO pins. The general idea is that you setup the data, wait a while, and then change the clock from 0 to 1. The chip you are talking to doesn't need a clock for internal operations. It just grabs a data bit on the rising edge of the clock. As long as there is plenty of setup/hold time you shouldn't have any troubles.

You can easily add hardware to do the low level part of sending a byte and such.

Do you have good pullups? That type of system is usually open collector/drain. (so you can hang several chips on the "bus". part of the protocol is an address)

Can't speak to NIOS implementation, but in general you should be able to do SPI writes all day long to unused pins. You should be able to do SPI reads also, just the data you'll get back will be all zeros or all ones depending on the state of the data-in pin. SPI is not real complicated.

Hope this helps,

-rajeev-