Xilinx "Ultrascale" announcement leaves out low-cost devices

I didn't listen to the video, but looking at the pictures... (what I do best)... it appears that they are indeed going the route of just one product line. Virtex UltraScale will be the only product in the Xilinx line at the 16 nm node.

The question is will having only one device line make a difference? Perhaps this will be a one size (or one process) fits all approach. Is there any reason why they can't make low end devices with a competitive price along with high end devices with all the bells and whistles under the same marketing name? How much different are the various product lines at the silicon level?

It looks like the mega-FPGA market is alive and well, but I don't see how an FPGA company can ignore the low end of the market. There are just too many products using too much silicon for any silicon vendor to ignore. If Xilinx won't address the smaller devices I'm sure others will.

Another indicator: They've dropped the Artix-7 SL/SLT lines that were announced in late 2012. Those were supposed to be available in small packages and with less LUTs, optionally without GTPs (AKA "bells and whistles"). Now they're back to the Artix-7 lineup that was originally announced from the beginning.

When Lattice dropped the ECP4 before it even started, they told us they now plan to concentrate on low to medium density FPGAs, low power and smaller packages, since that is what X and A don't cover with their lineup and they don't stand a chance with the bigger parts. Seems to me that Xilinx is handing over that market share to them now.

Greetings, Sean

Certainly Lattice has an interesting line with the Silicon Blue products they bought last year. They are clearly targeting space constrained, portable apps with small, low cost devices in very tiny packages. It is hard to find a chip in the ice40 line that you can use without ultra fine pitch traces and vias.

I haven't seen a similar product from anyone although I haven't looked hard at the low power Igloo parts. I don't see that they are truly low power once you start running them.

Well, a couple of years ago I listened to a keynote speech by Mentor Graphics's CEO. It was about profits in the chip business, FPGAs make the most money because they are expensive and leverage new process nodes early. I have to assume these are the big FPGAs, not the small ones... So Xilinx is going where the money is.

BTW, apparently Altera is coming up with small FPGAs along the lines of Lattice's MachXO2 line. It's funny how the XO2-1200 seems like a MaxII EPM1270 with 10 more LEs, a PLL and some RAM...

I have to wonder how long the high end of the market can remain a cash cow. We see the processing ability of PCs exceeding the needs of PC users. The result is a change in the market to smaller platforms with more convenience and much lower processing demands than what is offered in PCs. I am expecting something similar in the FPGA market. How many designs will there be for the ever larger FPGAs which don't actually run noticeably faster?

There will always be a need for cutting edge designs that have to get to the market quickly, but I expect there will be more profit in the mass quantity market as FPGAs start to take over from custom chip designs. The cost of silicon may be less when you design an ASIC, but if you can get to market 6 months or a year sooner for only $2 more per chip, I expect that is a *huge* advantage. The FPGA makers have to be serious about addressing the market though. You can't just toss any old FPGA out there and expect it to get design wins in quantity million sockets.

Any indications of when ?

No real surprise, the FPGA market is tough : huge R&D costs, and below average revenue growths. The biggest problem, is design lifetimes.

Anytime they go into a mass-volume, early adopter design, it is only a short time before the volumes will pay for tooling a cheaper alternative.

So they understand the best design lifetimes are in those areas where the volumes & design stability help them, and that is areas like ASIC simulation, and communications infrastructure.

Add onto that, the Corporate mindset, whereby some companies simply cannot make $1 parts, and it is easy to see Xilinx heading like intel.

I think it was 2014. I may have some notes somewhere but they were pretty vague on everything.

Yeah, the low end has been explored pretty well. Now it is just a matter of coming out with variations on the theme which give the best combination of support for a variety of designs. If the low end takes off, I don't see why it won't blossom like MCUs where there are lots and lots of different products with just the right combination of capabilities for nearly any task.

I just got an EOL notice on a Lattice XP part I'm using. My product has a lot of life left in it and I will have to redesign with a newer part. With any luck I'll be able to include a lot more capability. The present device is around 80% full.

At least I know what I'll be doing for the next project!

The notice is a bit short, only four months warning to get your final orders in.