I'm wondering what intrinsic ecomomic, technical, or "other" barriershave precluded FPGA device vendors from taking this step. In otherwords, why are there no advertised, periodic refreshes of oldergeneration FPGA devices.In the microprocessor world, many vendors have established a long andsuccesful history of developing a pin compatible product roadmap forcustomers. For the most part, these steps have allowed customers toreap periodic technology updates without incurring the need to performmajor re-work on their printed circuit card designs or underlyingsoftware.On the Xilinx side of the fence there appears to be no such parallel.Take for example, Virtex-II Pro. This has been a proven work-horse formany of our designs. It takes quite a bit of time to trulyunderstand and harness all of the capabilities and features offered bya platform device like this. After making the investment todevelop IP and hardware targeted at this technology, is it unreasonableto expect a forward looking roadmap that incorporates modest updates tothe silicon ? A step that doesn't require a flow blown jump to a newFPGA device family and subsequent re-work of the portfolio of hardwareand, very often, the related FPGA IP ?Sure, devices like Virtex-5 offer capabilities that will be trueenablers for many customers (and for us at times as well). But whynot apply a 90 or 65 nm process shrink to V2-Pro, provide modest speedbumps to the MGT, along with minor refinements to the hardwaremultipliers. Maybe toss in a PLL for those looking to recover clocksembedded in the MGT data stream etc. And make the resulting devices100% pin and code compatible with prior generations.Perhaps I'm off in the weeds. But, in our case, the ability to counton continued refinement and update of a pin-comaptible products likeV2-Pro would result in more orders of Xilinx silicon as opposed tofewer.The absence of such refreshes in the FPGA world leads me to believethat I must be naive. So I am trying to...

tweed_deluxe schrieb:it's just virtually impossible.if you make a process schrink on some MCU for example afterthe schrink the datasheet can remain almost the same with minorchanges.now if we would technology shrink some FPGA family then the amountof work to be done for new 'characterization' of the silicon isenourmous.and if you know the mask set pricing then you can easily understandthat this is not an option for any FPGA vendor.some pincompat could be achived between families, maybe, butif you want to have V2Pro in 'shrinked' technology (eg cheaper) thenit want happen. Antti

I agree with Kolja and Austin: technology moves ahead synchronously andon rails, and everybody has access to the same technology.That makes creative architecture and circuit design an ever moreimportant distinction between us competitors... Long live creativeideas, for they are not shackled by the roadmap!Peter Alfke, Xilinx==========================Kolja Sulimma wrote:

Why No Process Shrink On Prior FPGA Devices ?

Aug 24, 2006 22 Replies

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Austin Lesea 19 years ago

David,

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It is a bit hard to swallow, but if you really are interested, you have to read their entire plan (conspiracy theory is a good analogy -- it really is a plain in view world wide conspiracy!).

And, not just Xilinx must follow: the equipment Intel, ST Micro, TI, IBM, UMC, TSMC, etc all buy comes from the same "roadmap."

If it isn't in the roadmap, well, it has no support, and eventually, it will not exist.

Now, that may be too harsh, as some technology variants (such as 3-D circuits, a la Matrix Semi, purchased by SanDisk) did make use of the existing roadmap, with some minor tweaks. Even there, is this profitable? The jury is still out.

As for what to invest in? Wow. As an engineer I made a rule for myself: let someone else do the investing! My judgment in that regard has been proven to be absolutely TERRIBLE. Any engineer who thinks they are a good investor, I haven't seen one yet! It is hard enough to stay current and be an expert in what I am supposed to be an expert in, let alone deciding to be an expert in something unrelated.

Good luck,

Austin

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Kolja Sulimma 19 years ago

Austin Lesea schrieb:

Actually the semiconductor roadmap is the best example of a selffulfilling prophecy that I ever encountered. It is a widely accepted estimate of how fast semiconductor technology will progress.

The cost with semicon manufacturing is almost completely in R&D and building the fab and the livetime of a technology node is very short. This means that progressing faster than the competitors is EXTREMELY expensive. For beeing faster you need more R&D and at the same time you have less time to pay for the R&D of your previous technology.

On the other hand, beeing slower than you competitors can also be very expensive because the same chip can be manufactured cheaper in the newer technolgy and at the same time will be faster.

This situation is similar for many technologies, and technology progress will vary from company to company because nobody knows the speed of the competitors. But for semicon the costs are extreme, and there is this convenient roadmap that everybody seems to have agreed on. For that reason semiconductor progress is more or less in sync between all manufacturers.

Kolja Sulimma

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Peter Alfke 19 years ago

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