I'm wondering what intrinsic ecomomic, technical, or "other" barriers have precluded FPGA device vendors from taking this step. In other words, why are there no advertised, periodic refreshes of older generation FPGA devices.
In the microprocessor world, many vendors have established a long and succesful history of developing a pin compatible product roadmap for customers. For the most part, these steps have allowed customers to reap periodic technology updates without incurring the need to perform major re-work on their printed circuit card designs or underlying software.
On the Xilinx side of the fence there appears to be no such parallel. Take for example, Virtex-II Pro. This has been a proven work-horse for many of our designs. It takes quite a bit of time to truly understand and harness all of the capabilities and features offered by a platform device like this. After making the investment to develop IP and hardware targeted at this technology, is it unreasonable to expect a forward looking roadmap that incorporates modest updates to the silicon ? A step that doesn't require a flow blown jump to a new FPGA device family and subsequent re-work of the portfolio of hardware and, very often, the related FPGA IP ?
Sure, devices like Virtex-5 offer capabilities that will be true enablers for many customers (and for us at times as well). But why not apply a 90 or 65 nm process shrink to V2-Pro, provide modest speed bumps to the MGT, along with minor refinements to the hardware multipliers. Maybe toss in a PLL for those looking to recover clocks embedded in the MGT data stream etc. And make the resulting devices
100% pin and code compatible with prior generations.Perhaps I'm off in the weeds. But, in our case, the ability to count on continued refinement and update of a pin-comaptible products like V2-Pro would result in more orders of Xilinx silicon as opposed to fewer.
The absence of such refreshes in the FPGA world leads me to believe that I must be naive. So I am trying to understand where the logic is failing. Its just that there are times I wish the FPGA vendors could more closely parallel what the folks in the DSP and micro-processor world do ...