Hi, there:
I am trying to create some RPM files. It is a 32-bit bus macro from scratch. ISE6.0.3i won't route any of the wires! Can anybody teach me where I am wrong?
Best Regards, Kelvin
Script:
xst -ifn bm32.xst -ofn bm32.syr
ngdbuild -p xc2v500-fg256-6 -uc bm32.ucf bm32.ngc map -u -pr b bm32.ngd -o bm32_map.ncd bm32.pcf par -w bm32_map.ncd bm32.ncd bm32.pcf
# Run FPGA Editor to save it as nmc # save -w macro bm32_v2.nmc
XST File:
set -tmpdir . set -xsthdpdir ./xst run
-ifn bm32.prj
-ifmt mixed
-ofn bm32
-ofmt NGC
-p xc2v500-fg256-6
-top bm32
-opt_mode Speed
-keep_hierarchy YES
-hierarchy_separator /
-bus_delimiter ()
-glob_opt AllClockNets
-iobuf NO
PRJ File:
verilog work ./bm32.v
Source codes:
`timescale 1ns/1ps
module bm32 ( LI, LT, RI, RT, O );
input [31:0] LI; input [31:0] LT; input [31:0] RI; input [31:0] RT; output [31:0] O;
bm_4b_v2 bm_7 ( .LI( LI[31:28] ), .LT( LT[31:28] ), .RI( RI[31:28] ), .RT( RT[31:28] ), .O( O[31:28] ) ); bm_4b_v2 bm_6 ( .LI( LI[27:24] ), .LT( LT[27:24] ), .RI( RI[27:24] ), .RT( RT[27:24] ), .O( O[27:24] ) ); bm_4b_v2 bm_5 ( .LI( LI[23:20] ), .LT( LT[23:20] ), .RI( RI[23:20] ), .RT( RT[23:20] ), .O( O[23:20] ) ); bm_4b_v2 bm_4 ( .LI( LI[19:16] ), .LT( LT[19:16] ), .RI( RI[19:16] ), .RT( RT[19:16] ), .O( O[19:16] ) ); bm_4b_v2 bm_3 ( .LI( LI[15:12] ), .LT( LT[15:12] ), .RI( RI[15:12] ), .RT( RT[15:12] ), .O( O[15:12] ) ); bm_4b_v2 bm_2 ( .LI( LI[11:8 ] ), .LT( LT[11:8 ] ), .RI( RI[11:8 ] ), .RT( RT[11:8 ] ), .O( O[11:8 ] ) ); bm_4b_v2 bm_1 ( .LI( LI[ 7:4 ] ), .LT( LT[ 7:4 ] ), .RI( RI[ 7:4 ] ), .RT( RT[ 7:4 ] ), .O( O[ 7:4 ] ) ); bm_4b_v2 bm_0 ( .LI( LI[ 3:0 ] ), .LT( LT[ 3:0 ] ), .RI( RI[ 3:0 ] ), .RT( RT[ 3:0 ] ), .O( O[ 3:0 ] ) );
endmodule
`timescale 1ns / 1ps
module bm_4b_v2( LI, LT, RI, RT, O ); input [3:0] LI; input [3:0] LT; input [3:0] RI; input [3:0] RT; output [3:0] O;
//..synthesis translate_off BUFT bm_buf3_l ( .O( O[3] ), .I( LI[3] ), .T( LT[3] ) ); BUFT bm_buf2_l ( .O( O[2] ), .I( LI[2] ), .T( LT[2] ) ); BUFT bm_buf1_l ( .O( O[1] ), .I( LI[1] ), .T( LT[1] ) ); BUFT bm_buf0_l ( .O( O[0] ), .I( LI[0] ), .T( LT[0] ) ); BUFT bm_buf3_r ( .O( O[3] ), .I( RI[3] ), .T( RT[3] ) ); BUFT bm_buf2_r ( .O( O[2] ), .I( RI[2] ), .T( RT[2] ) ); BUFT bm_buf1_r ( .O( O[1] ), .I( RI[1] ), .T( RT[1] ) ); BUFT bm_buf0_r ( .O( O[0] ), .I( RI[0] ), .T( RT[0] ) ); //..synthesis translate_on endmodule
UCF file...
INST "bm_7/bm_buf3_l" LOC = "TBUF_X22Y11"; INST "bm_7/bm_buf2_l" LOC = "TBUF_X22Y10"; INST "bm_7/bm_buf1_l" LOC = "TBUF_X20Y11"; INST "bm_7/bm_buf0_l" LOC = "TBUF_X20Y10"; INST "bm_7/bm_buf3_r" LOC = "TBUF_X26Y11"; INST "bm_7/bm_buf2_r" LOC = "TBUF_X26Y10"; INST "bm_7/bm_buf1_r" LOC = "TBUF_X24Y11"; INST "bm_7/bm_buf0_r" LOC = "TBUF_X24Y10";
INST "bm_6/bm_buf3_l" LOC = "TBUF_X22Y13"; INST "bm_6/bm_buf2_l" LOC = "TBUF_X22Y12"; INST "bm_6/bm_buf1_l" LOC = "TBUF_X20Y13"; INST "bm_6/bm_buf0_l" LOC = "TBUF_X20Y12"; INST "bm_6/bm_buf3_r" LOC = "TBUF_X26Y13"; INST "bm_6/bm_buf2_r" LOC = "TBUF_X26Y12"; INST "bm_6/bm_buf1_r" LOC = "TBUF_X24Y13"; INST "bm_6/bm_buf0_r" LOC = "TBUF_X24Y12";
INST "bm_5/bm_buf3_l" LOC = "TBUF_X22Y15"; INST "bm_5/bm_buf2_l" LOC = "TBUF_X22Y14"; INST "bm_5/bm_buf1_l" LOC = "TBUF_X20Y15"; INST "bm_5/bm_buf0_l" LOC = "TBUF_X20Y14"; INST "bm_5/bm_buf3_r" LOC = "TBUF_X26Y15"; INST "bm_5/bm_buf2_r" LOC = "TBUF_X26Y14"; INST "bm_5/bm_buf1_r" LOC = "TBUF_X24Y15"; INST "bm_5/bm_buf0_r" LOC = "TBUF_X24Y14";
INST "bm_4/bm_buf3_l" LOC = "TBUF_X22Y17"; INST "bm_4/bm_buf2_l" LOC = "TBUF_X22Y16"; INST "bm_4/bm_buf1_l" LOC = "TBUF_X20Y17"; INST "bm_4/bm_buf0_l" LOC = "TBUF_X20Y16"; INST "bm_4/bm_buf3_r" LOC = "TBUF_X26Y17"; INST "bm_4/bm_buf2_r" LOC = "TBUF_X26Y16"; INST "bm_4/bm_buf1_r" LOC = "TBUF_X24Y17"; INST "bm_4/bm_buf0_r" LOC = "TBUF_X24Y16";
INST "bm_3/bm_buf3_l" LOC = "TBUF_X22Y19"; INST "bm_3/bm_buf2_l" LOC = "TBUF_X22Y18"; INST "bm_3/bm_buf1_l" LOC = "TBUF_X20Y19"; INST "bm_3/bm_buf0_l" LOC = "TBUF_X20Y18"; INST "bm_3/bm_buf3_r" LOC = "TBUF_X26Y19"; INST "bm_3/bm_buf2_r" LOC = "TBUF_X26Y18"; INST "bm_3/bm_buf1_r" LOC = "TBUF_X24Y19"; INST "bm_3/bm_buf0_r" LOC = "TBUF_X24Y18";
INST "bm_2/bm_buf3_l" LOC = "TBUF_X22Y21"; INST "bm_2/bm_buf2_l" LOC = "TBUF_X22Y20"; INST "bm_2/bm_buf1_l" LOC = "TBUF_X20Y21"; INST "bm_2/bm_buf0_l" LOC = "TBUF_X20Y20"; INST "bm_2/bm_buf3_r" LOC = "TBUF_X26Y21"; INST "bm_2/bm_buf2_r" LOC = "TBUF_X26Y20"; INST "bm_2/bm_buf1_r" LOC = "TBUF_X24Y21"; INST "bm_2/bm_buf0_r" LOC = "TBUF_X24Y20";
INST "bm_1/bm_buf3_l" LOC = "TBUF_X22Y23"; INST "bm_1/bm_buf2_l" LOC = "TBUF_X22Y22"; INST "bm_1/bm_buf1_l" LOC = "TBUF_X20Y23"; INST "bm_1/bm_buf0_l" LOC = "TBUF_X20Y22"; INST "bm_1/bm_buf3_r" LOC = "TBUF_X26Y23"; INST "bm_1/bm_buf2_r" LOC = "TBUF_X26Y22"; INST "bm_1/bm_buf1_r" LOC = "TBUF_X24Y23"; INST "bm_1/bm_buf0_r" LOC = "TBUF_X24Y22";
INST "bm_0/bm_buf3_l" LOC = "TBUF_X22Y25"; INST "bm_0/bm_buf2_l" LOC = "TBUF_X22Y24"; INST "bm_0/bm_buf1_l" LOC = "TBUF_X20Y25"; INST "bm_0/bm_buf0_l" LOC = "TBUF_X20Y24"; INST "bm_0/bm_buf3_r" LOC = "TBUF_X26Y25"; INST "bm_0/bm_buf2_r" LOC = "TBUF_X26Y24"; INST "bm_0/bm_buf1_r" LOC = "TBUF_X24Y25"; INST "bm_0/bm_buf0_r" LOC = "TBUF_X24Y24";