Virtex2 (500) DCM Frequency Synthesize

Hello I've got following problem: I need 27MHz and 54MHz clocks, input freq. is 20MHz. Till today I used DCM FS 27/20 next to DLL and DLL*2. Theoreticly it should works OK, but doesn't. From time to time after reboot or after clok stop, it works strange and completly bad. Today I've read about jitter on output of DCM's CLKFX, I check on "Virtex-II CLKFX Jitter Calculator" that in this conditions I have over 2 ns jitter on CLKFX output, which is to big for DLL input CLKIN. So I try to do this way: DCM FS 27/5 - I have 108MHz next to DLL/4 and DLL*2 The jitter on CLKFX should be below 1ns and now it must work but doesn't. What should I check else? Please help me, I lose my hair :>

Best regards Jerzy Gbur

Reply to
Jerzy
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Jerzy,

Since it sounds like you are cascading two DCMs, you must hold the second DCM in reset until the first has locked.

Cascading two DCMs from a CLKFX to a CLKIN to a CLKFX is not recommended, but has been characterized to work under most situations where the jitter from the first DCM does not exceed the requirement of the second DCM.

It is not recommended to have a CLKFX out to a CLKIN to a CLK0 (CLKDV, CLK2X) out (use of DLL) as this is a very poor cascade. The CLK0 should always come from the first DCM to the CLKIN of the second DCM which generates the CLKFX (if the frequencies work out).

It would be better to just take the 108 MHz from the first DCM and divide it down with a synchronous counter to get the 27 and 54 MHz signals, why use another DCM? This also reduces the jitter as a percentage of the period.

Not that I do not appreciate designers using every DCM they can (after all, I was on the team that designed it), the DCM is a short-cut to doing true synchonous design (with clock enables)!

Do not forget using the old simple techniques from years past, either.

Aust> Hello

Reply to
Austin Lesea

I would use two independent DCMs: first one multiplies by 27 and divides by 10, generates 54 MHz second one multiplies by 27 and divides by 20, generates 27 MHz

You can of course also generate 27 MHz by flip-flop-dividing the 54 MHz.

That gets you out of the cascading dilemma, when the output jitter is more than the input to a DCM tolerated. Always try to avoid cascading DCMs! Peter Alfke, Xilinx Applications

Reply to
Peter Alfke

Yes, I'll try that after weekend. It will be great that phase between

54MHz and 27MHz will be constans. Maybe dividing by flip-flop helps. Another thing, that 54MHz must drive external ZBT SRAM, so I'd like to use external feedback. And how to do it without DCM?

Best regards Jerzy Gbur

Reply to
Jerzy

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