Hi Friends We are having urgent requirement for Sr.Engineer (Verification) for our client in Bangalore.
Job Location: Bangalore.
Senior Engineer (Verification) =B7 Minimum 4 years experience spanning all aspects of VLSI/ASIC Design using RTL methodology =B7 Atleast 1 of the most recent years in leadership role in verification of a SOC level multi-million gate ASIC/FPGAs for networking/telecom area. =B7 Experience must include ability to interpret standards, lead teams to verify full SOC level ASICs or FPGAs along with other components like SDRAMs, CPUs etc. =B7 Experience with verification methodologies using HVLs (Vera, Specman, SystemC), HW-SW co-verification etc. =B7 Experience with modeling (including timing accurate) of functional blocks that are based on standards (including third party IP cores and embedded CPU/DSP processors) =B7 Experience with various networking standards and concepts like
802.3, VLAN, SONET, CCS7, ATM, DSL, VoP etc. =B7 History of verifying state of the art VLSI products/IPs in switching, routers, telecom etc. =B7 Experience in interfacing with VLSI design engineering, system design engineering and application engineering is a required B=2ETech/M.Tech in Electrical Engineering or Telecommunications
If interested, kindly send your updated profile
Regards, Rama Chandra Recruitment Specialist