Unconstrained ports for synthesis

Hello,

Can you be more specific as to the exact message that Quartus gives? You can cut ans paste the Quartus message in the reply. Also can you describe what is meant by "implictly constrainedwhile instanciating" in the post?

Subroto Datta Altera Corp.

Hi,

-- Error messages are......

Error: VHDL Entity Declaration error at Multiplier_Synth.Vhd(26): ports must be constrained Error: VHDL Entity Declaration error at Multiplier_Synth.Vhd(27): ports must be constrained Error: VHDL Entity Declaration error at Multiplier_Synth.Vhd(28): ports must be constrained Error: Can't elaborate user hierarchy "Core:Core_Map|Datapath:Datapath_Map" Error: Quartus II Analysis & Synthesis was unsuccessful. 4 errors, 0 warnings Error: Processing ended: Wed Apr 20 16:33:52 2005 Error: Elapsed time: 00:00:05

-- My Multiplier component is ......... entity Multiplier_Synth is port( Op1 : in signed; -- Operator 1 Op2 : in signed; -- Operator 2 Mult_Out : out signed -- Multiplication Result ); end entity Multiplier_Synth;

architecture Multiplier_Synth_Arch of Multiplier_Synth is begin Mult_Out Mux1_Out, Op2 => Mux2_Out, Mult_Out => Mult_Out );

Mux1_Out , Mux2_Out and Mult_Out are constrained signals . Hence Op1,Op2,Mult_Out implicitly can be constrained by bit length of

Thanks..

-- Mohammed A Khader.

Use generic parameters - e.g.:

entity Multiplier_Synth is generic( width : integer:=16 ); port( Op1 : in signed(width-1 downto 0); Op2 : in signed(width-1 downto 0); Mult_Out : out signed(width*2-1 downto 0) ); end entity Multiplier_Synth;

Generic parameters are overridden, if a generic mapping is used during instantiation. (Otherwise the given default value is used.) Because you have to define the bitwidth somewhere in your design, it does not matter where and how. Therefore Generic paramters are suitable. You can feed them from the very bottom to the top entity.

Ralf

Hello Mohammed,

We will be adding support for unconstrained entity ports in 5.1, due out later this year (we need to get 5.0 out first :-)). In the interim please use the generic approach suggested by Ralf.

Hope this helps, Subroto Datta Altera Corp.

I do not believe the Quartus compiler supports unconstrained ports. Either use generics to size the port, or use a synthesizer such as synplify that does support unconstrained ports.