Unconnected Done pin Virtex 6

Hello,

I just received my first FPGA board designed for work, and we have an issue regarding configuration of FPGA.

The JTAG chain passed all tests, and the programming proccess starts well (iMPACT)

The issue is an error in status register at the end of programming is returned by iMPACT. Done signal is not high, and I remember now we missed to connect this pin. Actually, on my board, Done pin is floatting.....

Is there a link between these two thinks?

What is the workaround? hard / soft

Thanks for your help.

frapa

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frapa
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Looks similar to this thread on the Xilinx forums:

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If it's really just the DONE pin, you can drive the DONE pin high by setting the "-g DriveDone" option for bitgen (From the GUI go to "Generate Programming File" properties, Startup Options, Drive Done Pin High).

Unfortunately any failure in configuration results in DONE not going high, so you may find that this is only a small part of your problems.

-- Gabor

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Gabor

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