Hello! I have an app where I have byte-wide data coming in at 125 MHz, and a system clock running at 125 Mhz, but they're not driven by the same source (alas). Thus, the source clock could be slightly faster or slightly slower than the internal system clock. Is there a standard way of dealing with these sorts of clock-async issues that doesn't involve an asynchronous FIFO?
I would just use one of the standard FIFOs discussed in the xilinx app notes and save myself some time and headache, but I read something at free-ip
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suggesting that the implementation in the app-notes was patented, and thus even a reimplementation of their approach wouldn't be allowed in an open-source hardware project.So, I was hoping there might be some non-FIFO implementation that might work :) Are there any classical approaches to this? ...Eric