just saw this
Imagine the CPLD you could ship with that process ?.
Coolrunner or Lattice like devices without the voltage ceiling pains...
-jg
Ok these devices like many previous 40V process probably use the LDD (lateral drain device) type structure which really just means that some IO devices can be made very high V tolerant ie open drain needed for LCD type panels. These are not .18u at all, more like several microns long underneath the field oxide which is way thicker than gate oxide and also acts as a thick field gate oxide.
Usually you don't want any signals above the ordinary field oxide to be high enough V to make unwanted transister effect under "plain wiring" hence signals also have to be limited to low V (
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