Trouble programming V4FX40

Did you source terminate the TCK? It might help. On my boards I've been known to use a NC7NZ34 or somesuch to buffer CCLK/TCK with source termination to each individual destinations. In your ribbon cable, did you make every other conductor ground? Works wonders for reducing crosstalk. Make sure you connect all the grounds at both ends of the ribbon cable. Ribbon cable is a great invention. It makes excellent speaker cable, BTW. Fits nicely under the carpet!

Cheers, Syms.

Reply to
Symon
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Yep there is a 30R resistor in the JTAG adapter.

I was thinking of doing that next time, thanks for the chip reference, it looks perfect for the purpose.

Of course. Sharing a single ground pin between signals in a flat cable is... evil ;)

A bit high L/C, but yeah. So does Cat5... (but it doesn't go under the carpet)

Reply to
PFC

You are absolutely correct, Symon. The edge rates of some buffers used for TCK can cause big problems if TCK is not treated like any other clock. TCK should be distributed and terminated like any other clock.

The data signals (TDI/TDO, TMS) are much more forgiving because they're updated on one edge and read on the other of TCK, so setup/hold times are easily met for reasonable TCK frequencies without any special attention. However, get TCK wrong and it won't work at any frequency (I have found this out the hard way and have learned my lesson).

Bob

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Reply to
BobW

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