synthesis tool for systemc

You can use sc2v to translate your SystemC code to a Verilog equivalent one and then synthesize it with a commercial Verilog synthesis tool. Sc2v is freely available at

Regards

Javier Castillo snipped-for-privacy@opensocdesign.com

"Chinix" wrote in news:1109590758.827243.293030 @f14g2000cwb.googlegroups.com:

Hi I downloas sc2v and i installed yacc and lex but i don't know what to do and how to realize the conversion .. Could anyone help me please??

If it needs yacc and lex then it sounds like what you have is the source code for the application. You either need to build the application, find a binary that'll work, or run away screaming.

If you just want it to work and if there's no binaries available, that's a sign to run away screaming.

Dne ?etrtek, 07. maj 2015 07.15.51 UTC+2 je oseba princesse91 napisala :

do and how to realize the conversion .. Could anyone help me please??

in Ubuntu 15.04 I was able to compile sc2v after installing packages flex a nd bison (command: sudo apt-get install flex bison). Then you have to compi le the source, which creates three executables in bin folder (sc2v_step1, s c2v_step2 ans sc2v_step3). A conversion from SystemC to Verilog can then be done by calling the sc2.sh (e.g.: ./sc2v.sh ../examples/sc_ex1).

Hope it help Jan

It occurs to me that if Princess is using Windows then things just won't work right.

In which case he/she/it should probably build under Cygwin, unless he/she/ it wishes to learn a lot more about making things work in a dual-build environment than may be sane.