I am planning on buying either a Xilinx Spartan or Altera Development Kit to test out some designs on FPGA. (I am New to FPGAs).
Once the design has been downloaded into the FPGA, how do I apply stimulus and test the design? I believe several methods are possible, but I would like one where both the stimulus (is applied in) and the response (is checked) using a high level language like C or C++. Are there any C/C++ "APIs" that allow the FPGA pins to be "wiggled"? That way I can write C or C++ code to run a real "app".
An FPGA is no different in this respect to any other piece of hardware you may design. So there is no software "API" to interface to an FPGA any more than there are APIs to interface to a 74LS02 or a LED.
You may be getting confused with *simulation*, which does not involve programming a physical FPGA but instead simulating the behaviour of your FPGA code in software. Stimulus can be provided in several manners and with many different languages, including C/C++.
Alternatively, you need to interface your FPGA to a PC via whatever means is suitable to the task, from a PCIe/PCI connector down to a serial port. Exactly how you interface in software is very dependent on the hardware interface method you choose.
Another alternative I've just thought of involves using a soft-core processor inside the FPGA to interface with the core logic, enabling you to write stimulus in C. That brings a whole number of new issues, not the least of which is the requirement for a much larger FPGA and perhaps more RAM than would otherwise be required.
Mark McDougall, Engineer
Virtual Logic Pty Ltd,
If you are new to FPGA, probably new to VHDL and Digital Design.
I hope you get some good references in Digital Systems, Synchronous design and Synthesizable VHDL (google, the Great Library). You won=B4t regret studying this and things will sound a lot more familiar...
Let me add: After the simulation tests the real hardware tests at the FPGA have to be done either using some pins and applying the stimuli from another device, like a personal computer or using a synthesized testbench, that has to be build additionally to the design.
To be precise :-) yes you can use a C API to talk to your design without using external stimuli/logic analyser etc. However, this is not commonly done and will mean extra $$$. I would however follow Mike's advice to first test your design to death using a testbench before downloading it to your FPGA. Using a simulator is a much better environment than debugging the actual hardware.
To answer the precise remark, you can use a product called Dialite from Temento (there are probably others as well) to add stimuli and monitor instruments (small synthesizable blocks) around your core. You then use the JTAG/Custom port + supplied C API (or Tcl and Perl) to drive the stimuli and to read the monitor instruments. Thus in effect you have virtual hardware environment around your core connected to a C API.
This strongly depends on your application and your available tools. In general your stimuli are generated by bit-banging. You could e.g. write a software that pulls up and down the pins of a RS232 connector. Or you could transmit data packages (via RS232, USB or whatever) to a receiver inside the FPGA (you need to build such one!) and apply "pre-computed" stimuli to your device under test.
You should not start with such a difficult task. You should first write a VHDL simulation testbench and test your design with this one. Then you should think about dedicated test hardware to test your design in the real world inside an FPGA.
Getting hardware to run is something that comes very late in the design process. I spend months until I only touched my first FPGA. Afterwards I worked for years without touching the hardware that I have modeled. (My testpattern where applied via a microcontroller at a tester. I have never seen this tester.)
First model, then simulate, then synthesize and simulate again (the netlist) and then you are almost done. Only after these steps hardware is needed.