Hi,
For the Spartan-II, the preconfiguration pullup resistors were selected by the M2 configuration pin. What about for the Spartan-3?
My new design has to connect an ARM7TDMI bus to the SPARTAN-3. I need to make sure my ucLinux will boot correctly, and so make sure about the IO pins states of the SPARTAN-3 on the poweron.
Regards, Laurent
Like Virtex-II and Virtex-II Pro, the Spartan-3 FPGA pre-configuration pull-up resistors are controlled by the HSWAP_EN pin.
0 = Enables weak pull-up resistors on all pins not actively involved in the configuration process.1 = No pull-up resistors during configuration.
After configuration, this pin is not used and should be kept at a logic 0 or
See page 13 of the Spartan-3 data sheet (Module 4, Pinouts) for more information.
--------------------------------- Steven K. Knapp Applications Manager, Xilinx Inc. Spartan-3/II/IIE FPGAs
--------------------------------- Spartan-3: Make it Your ASIC
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