Hi,
the data sheet tells 330MHz for CLKOUT_FREQ_2X_LF what yields into
660MBit/s while 620MBit/s are mentioned.ISE 6.2 compiles a small test with 200MHz clock (1x) constrains yielding into 800MBit/s. Will this work?
The device is a XC3S200-4FT256.
Thanks Thomas